On Tue, Nov 09, 2021 at 12:36:57AM -0800, Christoph Hellwig wrote:

On Mon, Nov 08, 2021 at 04:05:24AM +0000, Matthew Wilcox (Oracle) wrote:

quoted

These architectures do not include asm-generic/cacheflush.h so need
to declare it themselves.

In mainline mm/util.c implements flush_dcache_folio unless
ARCH_IMPLEMENTS_FLUSH_DCACHE_FOLIO is set.  So I think you need to
define that for csky and sparc.

There are three ways to implement flush_dcache_folio().  The first is
as a noop (this is what xtensa does, which is the only architecture
to define ARCH_IMPLEMENTS_FLUSH_DCACHE_FOLIO; it's also done
automatically by asm-generic if the architecture doesn't define
ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE).  The second is as a loop which calls
flush_dcache_page() for each page in the folio.  That's the default
implementation which you found in mm/util.c.  The third way, which I
hope architecture maintainers actually implement, is to just set the
needs-flush bit on the head page.  But that requires knowledge of each
architecture; they need to check the needs-flush bit on the head page
instead of the precise page.  So I've done the safe, slow thing for
all architectures.  The only reason that csky and sparc are "special"
is that they don't include asm-generic/cacheflush.h and the buildbots
didn't catch that before the merge window.

I'm doing the exact same thing for csky and sparc that I did for
arc/arm/m68k/mips/nds32/nios2/parisc/sh.  Nothing more, nothing less.