Re: [PATCH 5/5] nvme: support for zoned namespaces
From: Javier González <hidden>
Date: 2020-06-17 14:42:36
Also in:
linux-nvme
On 17.06.2020 09:43, Christoph Hellwig wrote:
On Tue, Jun 16, 2020 at 12:41:42PM +0200, Javier González wrote:quoted
On 16.06.2020 08:34, Keith Busch wrote:quoted
Add support for NVM Express Zoned Namespaces (ZNS) Command Set defined in NVM Express TP4053. Zoned namespaces are discovered based on their Command Set Identifier reported in the namespaces Namespace Identification Descriptor list. A successfully discovered Zoned Namespace will be registered with the block layer as a host managed zoned block device with Zone Append command support. A namespace that does not support append is not supported by the driver.Why are we enforcing the append command? Append is optional on the current ZNS specification, so we should not make this mandatory in the implementation. See specifics below.Because Append is the way to go and we've moved the Linux zoned block I/O stack to required it, as should have been obvious to anyone following linux-block in the last few months. I also have to say I'm really tired of the stupid politics tha your company started in the NVMe working group, and will say that these do not matter for Linux development at all. If you think it is worthwhile to support devices without Zone Append you can contribute support for them on top of this series by porting the SCSI Zone Append Emulation code to NVMe. And I'm not even going to read the rest of this thread as I'm on a vacation that I badly needed because of the Samsung TWG bullshit.
My intention is to support some Samsung ZNS devices that will not enable append. I do not think this is an unreasonable thing to do. How / why append ended up being an optional feature in the ZNS TP is orthogonal to this conversation. Bullshit or not, it ends up on devices that we would like to support one way or another. After the discussion with Damien and Keith I have a clear idea how we can do this and we will go ahead with the work. I apologize that this conversation got mixed with leftovers from NVMe TWG internals. This is a public mailing list, so I guess anyone can comment on it. Thanks, Javier