vga_pw sysfs file
From: Jeremy Kerr <jk@codeconstruct.com.au>
Date: 2021-11-17 00:47:51
Hi Oskar, I think Joel will send some details on the gfx driver side, but:
In uart_render_controller, however, we're checking whether the bottom 8 bit equal to 0xa8 (why are we not checking for != 0 here?)
This is because we want to ensure that we're in the init process of the host-side GPU driver, and not some arbitrary other access; it's been a while since working on this, but I *think* I remember seeing other areas of the scratch reg at non-zero values (granted, not the lower 8 bits though...). [There was some discussion with aspeed about the init value of 0x0 not being guaranteed on some part of the scratch register interface, but I don't recall what that applied to] We could change this to != 0, but there's a solid convention that the host-side driver is writing 0xa8 as the first part of init, so I think the current behaviour would provide a more solid check. Cheers, Jeremy