On 05/11/2026 02:18, Hongliang Yang (杨宏亮) wrote:
Add device tree binding for the CIX Sky1 Cadence USBSSP controller.
Each controller has an AXI bus attribute configuration register and a
controller status register inside the SoC RCSU, mapped by the reg
property at their real addresses, and contains the Cadence USBSSP core
as a child node at the core address.
Mode strap controls are programmed through the Sky1 S5 system
controller referenced by the cix,usb-syscon phandle, whose arguments
give the register offset and the bit position of the strap field.
Allow the #syscon-cells property on the system controller binding for
that.
Signed-off-by: Hongliang Yang <redacted>
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Changes in v6:
NAK, you did not respond, did not implement feedback or part of the
feedback.
Best regards,
Krzysztof