Hi,
quoted
+ refclk = devm_clk_get(rphy->dev, "phyclk");
+ if (IS_ERR(refclk))
+ return PTR_ERR(refclk);
Please insert a newline between each operation to improve readability.
quoted
+ rate = clk_get_rate(refclk);
+ if (rate != 24000000 && rate != 26000000)
+ return -EINVAL;
I will add a blank line here and between the other operations to improve
readability.
quoted
+ /* Set the normal line-state filter interval. */
+ ret = regmap_write(rphy->grf, reg + 0x0020, 0x30100);
+ if (ret)
+ return ret;
Here.
quoted
+ /* Increase HS voltage by 5.89% and double pre-emphasis current. */
+ ret = regmap_write(rphy->grf, reg + 0x000c, GENMASK(27, 24) | 0x0900);
+ if (ret)
+ return ret;
And here.
I will add blank lines at these places too.
I am working on splitting the patches by subsystem, and I will
resubmit this patch as part of v2 after addressing these comments.
Thank you for your review!
Best regards,
Cunhao Lu