[PATCH v2 5/9] ARM: dts: omap: dm816x: Correct speed for sysclk5
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WARM1d
From: Ettore Chimenti <hidden>
Date: 2026-10-28 16:06:31
Also in:
linux-devicetree, linux-omap, lkml
Subsystem:
omap clock framework support, omap device tree support, the rest · Maintainers:
Paul Walmsley, Aaro Koskinen, Andreas Kemnade, Kevin Hilman, Roger Quadros, Tony Lindgren, Linus Torvalds
From: Andrew Goodbody <redacted> The default code for setting up the clocks results in sysclk5 running at 1.6GHz whereas it is expected to run at half that ie 813MHz. Force the divider to be /2 to achieve the 813MHz speed. Signed-off-by: Andrew Goodbody <redacted> Signed-off-by: Ettore Chimenti <redacted> --- arch/arm/boot/dts/ti/omap/dm816x-clocks.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/ti/omap/dm816x-clocks.dtsi b/arch/arm/boot/dts/ti/omap/dm816x-clocks.dtsi
index 76ebc6c3c3e5..cb990773b098 100644
--- a/arch/arm/boot/dts/ti/omap/dm816x-clocks.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dm816x-clocks.dtsi@@ -144,7 +144,7 @@ sysclk5_ck: sysclk5_ck@310 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&sysclk4_ck>; - ti,max-div = <1>; + ti,dividers = <2>; reg = <0x0310>; };
--
2.56.0