[PATCH v5 6/7] arm64: dts: imx8dxl-evk: Move ACM MCLK pin to ACM pinctrl
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COOLING4d
REVIEWED: 1 (1M)
From: <hidden>
Date: 2026-10-27 15:01:34
Also in:
dri-devel, imx, linux-devicetree, lkml
Subsystem:
arm/freescale imx / mxc / layerscape arm architecture, the rest · Maintainers:
Frank Li, Sascha Hauer, Linus Torvalds
Status: Reviewed.
Revision v5 (5 revisions archived); 1 review trailer.
Revisions (5)
From: Frank Li <Frank.Li@nxp.com> Move the IMX8DXL_SPI3_CS0_ADMA_ACM_MCLK_OUT1 pin from the iomuxc hog group to the ACM pinctrl state. The pin is used as the ACM MCLK output and should be configured by its actual consumer rather than unconditionally claimed by a pinctrl hog. Prepare for LCDIF support, which uses the same pin. Acked-by: Liu Ying <victor.liu@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> --- arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
index f21ac208bf00e..159ec4ca1577b 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts@@ -349,6 +349,11 @@ sound-wm8960-3 { }; }; +&acm { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mclk>; +}; + &adc0 { vref-supply = <®_vref_1v8>; status = "okay";
@@ -947,7 +952,6 @@ pinctrl_hog: hoggrp { fsl,pins = < IMX8DXL_COMP_CTL_GPIO_1V8_3V3_GPIORHB_PAD 0x000514a0 IMX8DXL_COMP_CTL_GPIO_1V8_3V3_GPIORHK_PAD 0x000014a0 - IMX8DXL_SPI3_CS0_ADMA_ACM_MCLK_OUT1 0x0600004c IMX8DXL_SNVS_TAMPER_OUT1_LSIO_GPIO2_IO05_IN 0x0600004c >; };
@@ -1067,6 +1071,12 @@ IMX8DXL_SPI1_SDI_ADMA_I2C3_SCL 0x06000021 >; }; + pinctrl_mclk: mclkgrp { + fsl,pins = < + IMX8DXL_SPI3_CS0_ADMA_ACM_MCLK_OUT1 0x0600004c + >; + }; + pinctrl_lpuart0: lpuart0grp { fsl,pins = < IMX8DXL_UART0_RX_ADMA_UART0_RX 0x06000020
--
2.43.0