[PATCH v2 3/4] ASoC: dt-bindings: Add Cadence I2S-MC controller
COOLING7d
From: <hidden>
Date: 2026-09-28 05:36:35
Also in:
linux-devicetree, linux-sound, lkml
Subsystem:
open firmware and flattened device tree bindings, sound - soc layer / dynamic audio power management (asoc), the rest · Maintainers:
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Liam Girdwood, Mark Brown, Linus Torvalds
From: Joakim Zhang <redacted> Add the DT binding for the Cadence I2S-MC multi-channel controller integrated in the CIX SKY1 audio subsystem. The controller exposes a transmit DAI and a receive DAI and moves audio through a configurable set of its 8 data pins. Which pins are wired out and in which direction is fixed by the board design and described by the cix,pin-out-num, cix,pin-rx-mask and cix,pin-tx-mask properties. Signed-off-by: Joakim Zhang <redacted> --- .../bindings/sound/cix,sky1-i2s-mc.yaml | 123 ++++++++++++++++++ 1 file changed, 123 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/cix,sky1-i2s-mc.yaml
diff --git a/Documentation/devicetree/bindings/sound/cix,sky1-i2s-mc.yaml b/Documentation/devicetree/bindings/sound/cix,sky1-i2s-mc.yaml
new file mode 100644
index 000000000000..22528bb2940e
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/cix,sky1-i2s-mc.yaml@@ -0,0 +1,123 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/cix,sky1-i2s-mc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cadence I2S-MC controller + +maintainers: + - Joakim Zhang <joakim.zhang@cixtech.com> + +description: | + The Cadence I2S-MC multi-channel controller integrated in the CIX SKY1 + audio subsystem. It provides up to 8-channel playback and capture through + a configurable number of I2S data pins, and exposes two DAIs: a transmit + DAI and a receive DAI. + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + const: cix,sky1-i2s-mc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 4 + + clock-names: + items: + - const: hst + - const: i2s + - const: audio-clk0 + - const: audio-clk2 + + resets: + maxItems: 1 + + dmas: + minItems: 1 + maxItems: 2 + description: + One DMA channel for instances wired for a single direction, either + "tx" or "rx", or two channels for both transmit and receive. + + dma-names: + minItems: 1 + maxItems: 2 + items: + enum: [ tx, rx ] + + "#sound-dai-cells": + const: 1 + description: + Cell selects the DAI, 0 for the transmit DAI (i2s-mc-aif1) and + 1 for the receive DAI (i2s-mc-aif2). + + cix,pin-out-num: + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 8 + description: + Number of I2S data output pins wired on this instance. Which of + the 8 controller data pins are wired out is fixed by the board + design and can be any subset. + + cix,pin-rx-mask: + $ref: /schemas/types.yaml#/definitions/uint8 + description: + Bit mask of I2S data pins used for capture, bit N selects data + pin N. + + cix,pin-tx-mask: + $ref: /schemas/types.yaml#/definitions/uint8 + description: + Bit mask of I2S data pins used for playback, bit N selects data + pin N. The rx and tx masks must not overlap, and the number of + set bits must not exceed cix,pin-out-num. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - dmas + - dma-names + - "#sound-dai-cells" + - cix,pin-out-num + - cix,pin-rx-mask + - cix,pin-tx-mask + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + audss_dmac: dma-controller { + #dma-cells = <1>; + }; + + i2s@7050000 { + compatible = "cix,sky1-i2s-mc"; + reg = <0x7050000 0x10000>; + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&audss_cru 17>, <&audss_cru 27>, + <&scmi_clk 100>, <&scmi_clk 101>; + clock-names = "hst", "i2s", "audio-clk0", "audio-clk2"; + resets = <&audss_cru 1>; + dmas = <&audss_dmac 2>, <&audss_dmac 3>; + dma-names = "tx", "rx"; + #sound-dai-cells = <1>; + cix,pin-out-num = /bits/ 8 <2>; + cix,pin-rx-mask = /bits/ 8 <0x1>; + cix,pin-tx-mask = /bits/ 8 <0x2>; + };
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2.50.1