Re: [PATCH v2 1/3] dt-bindings: pwm: amlogic: Add core clock for T7

On 9/26/26 8:06 PM, Conor Dooley wrote:

On Sat, Sep 26, 2026 at 11:43:20AM +0200, linux-kernel-dev@aliel.fr wrote:

quoted

On 9/25/26 6:41 PM, Conor Dooley wrote:

quoted

On Fri, Sep 25, 2026 at 05:13:28PM +0200, Ronald Claveau via B4 Relay wrote:

quoted

From: Ronald Claveau <redacted>

The T7, A1, C3, and S4 PWM controllers have a system clock in
addition to the two input clocks of channels A and B.

The channel clocks are acquired by index in the pwm driver,
where the core clock is fetched by name, with optional get
which is silent when not provided.

Require clock-names and minimum 3 items for T7, where the
PWM devices do not work without all 3 clocks.

Add an example showing T7 usage with its fallback to
amlogic,meson-s4-pwm.

Signed-off-by: Ronald Claveau <redacted>
---
 .../devicetree/bindings/pwm/pwm-amlogic.yaml       | 33 ++++++++++++++++++++--
 1 file changed, 31 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml
index c337d85da40f1..59320f288552b 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml
+++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml

@@ -62,7 +62,7 @@ properties:
 
   clock-names:
     minItems: 1
-    maxItems: 2
+    maxItems: 3
 
   power-domains:
     maxItems: 1

@@ -140,13 +140,34 @@ allOf:
     then:
       properties:
         clocks:
+          minItems: 2
           items:
             - description: input clock of PWM channel A
             - description: input clock of PWM channel B
-        clock-names: false
+            - description: gate clock for the PWM controller
+        clock-names:
+          minItems: 2
+          items:
+            - const: channel-a
+            - const: channel-b
+            - const: core
       required:
         - clocks
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: amlogic,t7-pwm

Shouldn't this (based on your reply on the previous version) be s4?

The change above is for S4 and SOCs which fallback to S4. It allows the
third clock but let the schema validation compatible with two clocks
existing DTS. Here for the T7, I add requirement for the exact 3 clocks.

Do you recommend to require the 3 clocks for all S4 and S4 fallback, and
update the associated dtsi files ?

Yes, I think so. Sounds to me like they only work because of the
CLK_IGNORE_UNUSED set in their clock controller drivers, so the correct
thing to do is make them all require the third clock.

Great, Thank you for your feedback, I sent a V3 matching this.

quoted

quoted

quoted

+    then:
+      properties:
+        clocks:
+          minItems: 3
+        clock-names:
+          minItems: 3
+      required:
+        - clock-names
+
   - if:
       properties:
         compatible:

@@ -182,3 +203,11 @@ examples:
       clocks = <&pwm_src_a>, <&pwm_src_b>;
       #pwm-cells = <3>;
     };
+  - |
+    pwm@60000 {
+      compatible = "amlogic,t7-pwm", "amlogic,meson-s4-pwm";
+      reg = <0x60000 0x24>;
+      clocks = <&channel_a>, <&channel_b>, <&core>;
+      clock-names = "channel-a", "channel-b", "core";
+      #pwm-cells = <3>;
+    };

-- 
2.49.0

-- 
Best regards,
Ronald

-- 
Best regards,
Ronald