Re: [PATCH 0/4] arm64: dts: freescale: Add Toradex iMX95 overlays

On Tue, Sep 22, 2026 at 06:58:46PM +0200, Francesco Dolcini wrote:

On Tue, Sep 22, 2026 at 11:07:44AM -0500, Frank Li wrote:

quoted

On Tue, Sep 22, 2026 at 04:33:45PM +0200, Ernest Van Hoecke wrote:

quoted

This series adds device tree overlays for the Toradex Verdin, Aquila,
and SMARC iMX95 SoMs.

The series adds support for:
- NAU8822 Bridge Tied Load configuration on the Verdin Development Board
- UART_4 reservation for Cortex-M7 firmware on Verdin and Aquila
- SER0 reservation for Cortex-M7 firmware on SMARC

The UART overlays mark the port as reserved so Linux does not claim it.
Firmware remains responsible for configuring the UART and its pads.

The Makefile entries build standalone DTBOs and ready-to-use composed
DTBs for the corresponding Development Boards.

Signed-off-by: Ernest Van Hoecke <redacted>
---
Ernest Van Hoecke (4):
      arm64: dts: freescale: imx95-verdin: Add NAU8822 Bridge Tied Load
      arm64: dts: freescale: imx95-verdin: Add Cortex-M7 UART_4 overlay
      arm64: dts: freescale: imx95-aquila: Add Cortex-M7 UART_4 overlay

both reserved lpuart2, can you share one dtso?

The comment in the DT file must be different because it's important to
reference the actual board it applies to.

So to fulfill this request we would need to add a common dtsi, include
it from two different dtso files.

No, direct use one dtso. see

https://elixir.bootlin.com/linux/v7.3-rc3/source/arch/arm64/boot/dts/freescale/imx-pcie0-ep.dtso

And makefile to check how apply the same dtso for difference boards

Frank

This to save 2 lines of duplicated code, `&lpuart2 { status = "reserved"; };`.

To me this is just worst than the current proposal.

Francesco