Re: [PATCH] clk: nuvoton: ma35d1: Use clk_hw pointers as mux parents

Hi Jacky,

For example:

    static const struct clk_parent_data wdt1_sel_clks[] = {
            { .index = -1, },
            { .fw_name = "lxt", },
            { .fw_name = "pclk3_div4096", },
            { .fw_name = "lirc", },
    };

The TRM lists PCLK3/4096 and PCLK4/4096 as valid selectable parent
clocks for the WDT/WWDT blocks.

However, the new conversion changes these entries to -1:

    static const int wdt1_parent_idx[] = {
            -1, LXT, -1, LIRC
    };

That's indeed correct. Thanks for the proposal below, I will include it
in the next iteration.

[...]

I have also tested this version on an MA35D1 board, and the clock
parent conversion appears to work correctly for the peripherals I
tested.

Nice! If you're happy with v2, don't hesitate to send a formal
Tested-by!

Thanks,
Miquèl