Re: [PATCH v9 1/9] arm64: dts: ti: k3-am62a-phycore-som: Fix wkup R5F memory region size
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From: Wadim Egorov <hidden>
Date: 2026-09-18 11:32:18
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linux-devicetree, lkml, llvm
On 9/18/26 12:17 PM, Markus Schneider-Pargmann (TI) wrote:
The wkup_r5fss0_core0_memory_region was reserved with only
0x0f00000 but the MCU SDK linker for the wkup R5F firmware on
AM62A defines the DM code/data DDR footprint differently:
/* DDR for DM R5F code/data [ size 27 MiB + 364 KB ] */
DDR : ORIGIN = 0x9CAA5000 LENGTH = 0x1B5B000
which results in an end at 0x9e600000. For this memory region which
starts at 0x9c900000 this means a length of:
0x9e600000 - 0x9c900000 = 0x1d00000
AM62A additionally has a second DM firmware for edgeai whose highest
section end address reaches 0x9e700000, so the region should end there:
0x9e700000 - 0x9c900000 = 0x1e00000
Link: https://github.com/TexasInstruments/mcupsdk-core-k3/blob/k3_main/examples/drivers/ipc/ipc_rpmsg_echo_linux/am62ax-sk/r5fss0-0_freertos/ti-arm-clang/linker.cmd
Fixes: 8dd0ac27fcd1 ("arm64: dts: ti: k3-am62a-phycore-som: Enable Co-processors")
Acked-by: Andrew Davis <redacted>
Reviewed-by: Bryan Brattlof <redacted>
Reviewed-by: Kendall Willis <redacted>
Signed-off-by: Markus Schneider-Pargmann (TI) <msp@baylibre.com>Reviewed-by: Wadim Egorov <redacted>
quoted hunk ↗ jump to hunk
--- arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)diff --git a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi index de4048a3564b..53c096da68b5 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi@@ -67,7 +67,7 @@ wkup_r5fss0_core0_dma_memory_region: memory@9c800000 { wkup_r5fss0_core0_memory_region: memory@9c900000 { compatible = "shared-dma-pool"; - reg = <0x00 0x9c900000 0x00 0xf00000>; + reg = <0x00 0x9c900000 0x00 0x1e00000>; no-map; };