[PATCH v3 0/3] Support AM62P silicon revision detection via uniphier-efuse

This series adds support for reading AM62P silicon revision from the
efuse GP_SW register. The solution reuses the  existing uniphier-efuse
driver by adding ti,am62p-efuse as a compatible string. The three patches
update the devicetree binding to document the new compatible, configure
the driver as mandatory builtin for K3 architectures, and extend the driver
to support AM62P devices. The uniphier-efuse driver is simple enough to be
reused for efuse register reads on the AM62P SoC.

Patches have been tested on AM62p SK hardware using SR1.0, SR1.1 and SR1.2
silicon.

Changes since v2:
- Add Kunihiko's review tag
- Update binding to include fallback compatible as per Conor's review [0]

Link to v2:
https://lore.kernel.org/all/20260902222759.736124-1-jm@ti.com/ (local)
Link to rfc:
https://lore.kernel.org/all/20260812154442.3379851-1-jm@ti.com/ (local)

[0] https://lore.kernel.org/all/aqEuyLac2OGkSYX7@squawk/ (local)

Judith Mendez (3):
  dt-bindings: nvmem: uniphier-efuse: Add ti,am62p-efuse compatible
  nvmem: uniphier-efuse: Enable for K3 SoCs
  nvmem: uniphier-efuse: Add ti,am62p-efuse compatible

 .../devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml | 6 +++++-
 drivers/nvmem/Kconfig                                       | 3 ++-
 drivers/nvmem/uniphier-efuse.c                              | 1 +
 3 files changed, 8 insertions(+), 2 deletions(-)

-- 
2.34.1