From: Jia Wang <wangjia@ultrarisc.com> Date: 2026-09-07 07:47:33
The UltraRISC DP1000 integrates a Synopsys DesignWare GMAC from the 5.20
series with fixed internal delays on both TX and RX RGMII clock paths.
For boards without PCB delays, "rgmii-id" describes the link. Passing this
mode unchanged to the PHY would enable another pair of delays and break
RGMII timing.
Add TX and RX internal-delay capability flags to the common stmmac platform
data and adjust the PHY interface mode in stmmac_pltfr_probe(). Convert the
Sophgo and EIC7700 glue drivers to this common handling, then add the DP1000
binding and glue driver. The DP1000 glue driver only declares both delay
capabilities.
Tested with:
1. dt_binding_check and dtbs_check.
2. RISC-V build with CONFIG_DWMAC_ULTRARISC=m.
3. Runtime validation on Shenzhen Rongda M0 with a YT8531S PHY and
Milk-V Titan with an RTL8211F PHY: ultrarisc-dwmac binds and
establishes a 1000 Mb/s full-duplex link on both boards.
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
---
Changes in v2:
- Fold the snps,dwmac compatible-list update into the DP1000 binding patch.
- Add common stmmac capability flags for MAC-provided RGMII delays.
- Convert Sophgo and EIC7700 to the common RGMII delay handling.
- Simplify the DP1000 glue driver to declare its TX and RX delay
capabilities.
- Add Conor Dooley's Reviewed-by tag to the DP1000 binding patch.
- Link to v1: https://patch.msgid.link/20260901-dwmac-ultrarisc-v1-0-f19454814bcf@ultrarisc.com
To: Andrew Lunn <andrew+netdev@lunn.ch>
To: "David S. Miller" <davem@davemloft.net>
To: Eric Dumazet <edumazet@google.com>
To: Jakub Kicinski <kuba@kernel.org>
To: Paolo Abeni <pabeni@redhat.com>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Jia Wang <wangjia@ultrarisc.com>
To: Alexandre Torgue <alexandre.torgue@foss.st.com>
To: Giuseppe Cavallaro <redacted>
To: Jose Abreu <redacted>
To: Maxime Chevallier <maxime.chevallier@bootlin.com>
To: Maxime Coquelin <mcoquelin.stm32@gmail.com>
To: Chen Wang <chen.wang@linux.dev>
To: Inochi Amaoto <inochiama@gmail.com>
Cc: netdev@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-stm32@st-md-mailman.stormreply.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: sophgo@lists.linux.dev
---
Jia Wang (5):
net: stmmac: Add common internal RGMII delay handling
net: stmmac: sophgo: Use common RGMII delay handling
net: stmmac: eic7700: Use common RGMII delay handling
dt-bindings: net: Add UltraRISC DP1000 GMAC
net: stmmac: Add UltraRISC DP1000 GMAC support
.../devicetree/bindings/net/snps,dwmac.yaml | 1 +
.../bindings/net/ultrarisc,dp1000-gmac.yaml | 74 ++++++++++++++++++++++
MAINTAINERS | 6 ++
drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 ++++
drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
.../net/ethernet/stmicro/stmmac/dwmac-eic7700.c | 13 +---
drivers/net/ethernet/stmicro/stmmac/dwmac-sophgo.c | 12 ++--
.../net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c | 52 +++++++++++++++
.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 11 ++++
include/linux/stmmac.h | 2 +
10 files changed, 164 insertions(+), 19 deletions(-)
---
base-commit: df2908090cda368b01ff43709f51890076c56157
change-id: 20260827-dwmac-ultrarisc-7c79f2f80fd1
Best regards,
--
Jia Wang [off-list ref]
From: Jia Wang <wangjia@ultrarisc.com> Date: 2026-09-07 07:47:31
Describe the SG2042 internal RX delay through the common stmmac
platform data and let stmmac_pltfr_probe() adjust the PHY interface
mode.
This removes the duplicated mode conversion without changing the
hardware behavior.
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sophgo.c | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
From: Jia Wang <wangjia@ultrarisc.com> Date: 2026-09-07 07:47:33
Describe the EIC7700 inherent TX delay through the common stmmac
platform data and let stmmac_pltfr_probe() adjust the PHY interface
mode.
Keep the existing programmable TX and RX delay configuration in the
EIC7700 glue driver.
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c | 13 ++-----------
1 file changed, 2 insertions(+), 11 deletions(-)
From: Jia Wang <wangjia@ultrarisc.com> Date: 2026-09-07 07:47:33
Some DWMAC integrations add fixed RGMII clock delays internally.
Glue drivers need to account for these delays before passing the
interface mode to the PHY.
Add TX and RX delay capability flags to the common platform data.
Apply phy_fix_phy_mode_for_mac_delays() in stmmac_pltfr_probe() when
either capability is present.
This lets glue drivers describe the MAC capabilities without
duplicating the interface-mode validation and conversion.
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
---
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 11 +++++++++++
include/linux/stmmac.h | 2 ++
2 files changed, 13 insertions(+)
From: Jia Wang <wangjia@ultrarisc.com> Date: 2026-09-07 07:47:34
The DP1000 integrates a Synopsys DesignWare GMAC from the 5.20 series with
one MMIO register range, one clock and one interrupt.
It also provides fixed TX and RX RGMII clock delays that cannot be
disabled. Board connections must therefore not add either delay in PCB
traces, making "rgmii-id" the only supported phy-mode.
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
.../devicetree/bindings/net/snps,dwmac.yaml | 1 +
.../bindings/net/ultrarisc,dp1000-gmac.yaml | 74 ++++++++++++++++++++++
MAINTAINERS | 5 ++
3 files changed, 80 insertions(+)
From: Jia Wang <wangjia@ultrarisc.com> Date: 2026-09-07 07:47:35
The UltraRISC DP1000 GMAC provides fixed internal delays on both TX and RX
RGMII clock paths.
Add a platform glue driver and describe both delay capabilities through
the common stmmac platform data. This lets the common RGMII delay handling
adjust the interface mode passed to the PHY and reject incompatible RGMII
modes.
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
---
MAINTAINERS | 1 +
drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 +++++
drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
.../net/ethernet/stmicro/stmmac/dwmac-ultrarisc.c | 52 ++++++++++++++++++++++
4 files changed, 65 insertions(+)
From: Maxime Chevallier <maxime.chevallier@bootlin.com> Date: 2026-09-07 11:45:18
Hi,
On 9/7/26 09:46, Jia Wang wrote:
quoted hunk
Some DWMAC integrations add fixed RGMII clock delays internally.
Glue drivers need to account for these delays before passing the
interface mode to the PHY.
Add TX and RX delay capability flags to the common platform data.
Apply phy_fix_phy_mode_for_mac_delays() in stmmac_pltfr_probe() when
either capability is present.
This lets glue drivers describe the MAC capabilities without
duplicating the interface-mode validation and conversion.
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
---
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 11 +++++++++++
include/linux/stmmac.h | 2 ++
2 files changed, 13 insertions(+)
Seems good, the default values should be false hence this condition won't be taken,
Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Maxime
From: Maxime Chevallier <maxime.chevallier@bootlin.com> Date: 2026-09-07 11:46:12
Hi,
On 9/7/26 09:46, Jia Wang wrote:
Describe the SG2042 internal RX delay through the common stmmac
platform data and let stmmac_pltfr_probe() adjust the PHY interface
mode.
This removes the duplicated mode conversion without changing the
hardware behavior.
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sophgo.c | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
Ah good :)
Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Maxime
From: Maxime Chevallier <maxime.chevallier@bootlin.com> Date: 2026-09-07 11:46:50
Hi,
On 9/7/26 09:46, Jia Wang wrote:
Describe the EIC7700 inherent TX delay through the common stmmac
platform data and let stmmac_pltfr_probe() adjust the PHY interface
mode.
Keep the existing programmable TX and RX delay configuration in the
EIC7700 glue driver.
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Maxime
From: Maxime Chevallier <maxime.chevallier@bootlin.com> Date: 2026-09-07 11:48:53
Hi,
On 9/7/26 09:46, Jia Wang wrote:
The UltraRISC DP1000 GMAC provides fixed internal delays on both TX and RX
RGMII clock paths.
Add a platform glue driver and describe both delay capabilities through
the common stmmac platform data. This lets the common RGMII delay handling
adjust the interface mode passed to the PHY and reject incompatible RGMII
modes.
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Maxime
Hello:
This series was applied to netdev/net-next.git (main)
by Paolo Abeni [off-list ref]:
On Mon, 07 Sep 2026 15:46:49 +0800 you wrote:
The UltraRISC DP1000 integrates a Synopsys DesignWare GMAC from the 5.20
series with fixed internal delays on both TX and RX RGMII clock paths.
For boards without PCB delays, "rgmii-id" describes the link. Passing this
mode unchanged to the PHY would enable another pair of delays and break
RGMII timing.
[...]