Thread (4 messages) flat view 4 messages, 2 authors, 6d ago
COOLING6d

[PATCH 1/2] arm64: sysreg: Make write_sysreg_s() select XZR without optimisation

From: Sascha Bischoff <hidden>
Date: 2026-09-04 17:50:07
Also in: kvm, kvmarm, lkml
Subsystem: arm64 port (aarch64 architecture), the rest · Maintainers: Catalin Marinas, Will Deacon, Linus Torvalds

write_sysreg_s() tests whether its local __val variable is constant when
deciding whether to use XZR. Compilers only recognise that __val was
initialised with a constant zero after constant propagation.

With optimisation disabled, the fallback path therefore selects an
arbitrary general-purpose register. This is incorrect for instructions
such as GIC CDEOI, where Rt must be XZR rather than a register containing
zero.

Test the macro argument directly so that constant zero selects XZR
regardless of the optimisation level.

Fixes: e9ad390a4812 ("arm64/sysreg: Fix GIC CDEOI instruction encoding")
Signed-off-by: Sascha Bischoff <redacted>
---
 arch/arm64/include/asm/sysreg.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 7aa08d59d4944..a80bede50f865 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -1204,7 +1204,7 @@
 #define write_sysreg_s(v, r) do {					\
 	u64 __val = (u64)(v);						\
 	u32 __maybe_unused __check_r = (u32)(r);			\
-	if (__builtin_constant_p(__val) && __val == 0)			\
+	if (__builtin_constant_p(v) && (u64)(v) == 0)			\
 		asm volatile(__msr_s(r, "xzr"));			\
 	else								\
 		asm volatile(__msr_s(r, "%x0") : : "r" (__val));	\
-- 
2.34.1
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help