[PATCH v6 03/49] irqchip/gic-v5: Set up gic_kvm_info on ACPI hosts
From: Sascha Bischoff <hidden>
Date: 2026-09-04 11:36:40
Also in:
kvm, kvmarm
Subsystem:
arm generic interrupt controller drivers, arm generic interrupt controller v5 drivers, irqchip drivers, the rest · Maintainers:
Marc Zyngier, Lorenzo Pieralisi, Thomas Gleixner, Linus Torvalds
Device-tree based GICv5 probing already passes the IRS details and maintenance interrupt to KVM, but the ACPI path only initialises the irqchip and installs the ACPI IRQ model. As a result, KVM never sees the GICv5 host information required to probe the vGIC on ACPI systems. Add the ACPI equivalent of the DT KVM setup. Parse the MADT GICC entries for the maintenance interrupt, retaining the value from the first relevant entry and warning if later entries disagree. Warn if firmware describes the interrupt as edge-triggered, but register it as a level-sensitive, active-high GSI. Pass the resulting IRQ together with the IRS base and coherency information to KVM. Native GICv5 does not require a maintenance interrupt unless the legacy GICv3-compatible CPU interface is present, so preserve the existing no-maintenance-IRQ handling for that case. Signed-off-by: Sascha Bischoff <redacted> --- drivers/irqchip/irq-gic-v5.c | 94 ++++++++++++++++++++++++++++++++++-- 1 file changed, 90 insertions(+), 4 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v5.c b/drivers/irqchip/irq-gic-v5.c
index 29e9c59a3fb09..40a1c47b6f2a5 100644
--- a/drivers/irqchip/irq-gic-v5.c
+++ b/drivers/irqchip/irq-gic-v5.c@@ -1120,7 +1120,7 @@ static void gicv5_set_cpuif_idbits(void) #ifdef CONFIG_KVM static struct gic_kvm_info gic_v5_kvm_info __initdata; -static void __init gic_of_setup_kvm_info(struct device_node *node) +static int __init gic_setup_kvm_info(unsigned int maint_irq) { struct gicv5_irs_chip_data *irs_data = gicv5_irs_get_chip_data();
@@ -1131,17 +1131,19 @@ static void __init gic_of_setup_kvm_info(struct device_node *node) */ if (!gicv5_global_data.virt_capable) { pr_info("GIC implementation is not virtualization capable\n"); - return; + return -ENODEV; } - gic_v5_kvm_info.type = GIC_V5; + if (WARN_ON(!irs_data)) + return -ENODEV; + gic_v5_kvm_info.type = GIC_V5; gic_v5_kvm_info.gicv5_irs.base = irs_data->irs_base; gic_v5_kvm_info.gicv5_irs.non_coherent = !!(irs_data->flags & IRS_FLAGS_NON_COHERENT); /* GIC Virtual CPU interface maintenance interrupt */ gic_v5_kvm_info.no_maint_irq_mask = false; - gic_v5_kvm_info.maint_irq = irq_of_parse_and_map(node, 0); + gic_v5_kvm_info.maint_irq = maint_irq; /* * We require an MI if we have legacy support, but don't, otherwise.
@@ -1156,11 +1158,93 @@ static void __init gic_of_setup_kvm_info(struct device_node *node) gic_v5_kvm_info.no_maint_irq_mask = true; vgic_set_kvm_info(&gic_v5_kvm_info); + return 0; +} + +static void __init gic_of_setup_kvm_info(struct device_node *node) +{ + unsigned int maint_irq; + + /* GIC Virtual CPU interface maintenance interrupt */ + maint_irq = irq_of_parse_and_map(node, 0); + if (gic_setup_kvm_info(maint_irq)) + irq_dispose_mapping(maint_irq); +} + +#ifdef CONFIG_ACPI +struct gicv5_acpi_kvm_info { + u32 maint_irq; + bool valid; +}; + +static struct gicv5_acpi_kvm_info acpi_v5_kvm_info __initdata; + +static int __init gic_acpi_parse_virt_madt_gicc(union acpi_subtable_headers *header, + const unsigned long end) +{ + struct acpi_madt_generic_interrupt *gicc = + (struct acpi_madt_generic_interrupt *)header; + + if (!(gicc->flags & + (ACPI_MADT_ENABLED | ACPI_MADT_GICC_ONLINE_CAPABLE))) + return 0; + + if (gicc->flags & ACPI_MADT_VGIC_IRQ_MODE) + pr_warn_once(FW_BUG "MI wrongly advertised as Edge-triggered\n"); + + if (!acpi_v5_kvm_info.valid) { + acpi_v5_kvm_info.valid = true; + acpi_v5_kvm_info.maint_irq = gicc->vgic_interrupt; + return 0; + } + + if (acpi_v5_kvm_info.maint_irq != gicc->vgic_interrupt) + pr_warn_once(FW_BUG "MI not the same on all CPUs\n"); + + return 0; } + +static bool __init gic_acpi_collect_virt_info(void) +{ + acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT, + gic_acpi_parse_virt_madt_gicc, 0); + + return acpi_v5_kvm_info.valid; +} + +static void __init gic_acpi_setup_kvm_info(void) +{ + int irq = 0; + + if (!gic_acpi_collect_virt_info()) { + pr_warn("Unable to get hardware information used for virtualization\n"); + return; + } + + if (acpi_v5_kvm_info.maint_irq) { + irq = acpi_register_gsi(NULL, acpi_v5_kvm_info.maint_irq, + ACPI_LEVEL_SENSITIVE, + ACPI_ACTIVE_HIGH); + if (irq <= 0) { + pr_warn("Failed to register GSI for GICv5 maintenance IRQ\n"); + irq = 0; + } + } + + if (gic_setup_kvm_info(irq) && irq) + acpi_unregister_gsi(acpi_v5_kvm_info.maint_irq); +} +#endif // CONFIG_ACPI #else static inline void __init gic_of_setup_kvm_info(struct device_node *node) { } + +#ifdef CONFIG_ACPI +static inline void __init gic_acpi_setup_kvm_info(void) +{ +} +#endif #endif // CONFIG_KVM static int __init gicv5_init_common(struct fwnode_handle *parent_domain)
@@ -1270,6 +1354,8 @@ static int __init gic_acpi_init(union acpi_subtable_headers *header, const unsig acpi_set_irq_model(ACPI_IRQ_MODEL_GIC_V5, gic_v5_get_gsi_domain_id, gic_v5_get_gsi_handle); + gic_acpi_setup_kvm_info(); + return 0; out_irs:
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2.34.1