Re: [PATCH v2] arm64: mpam: Document when to set arm64.nompam
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From: Bradley Morgan <hidden>
Date: 2026-09-04 10:35:59
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On 4 September 2026 11:31:31 BST, Fuad Tabba [off-list ref] wrote:
arm64.nompam skips the MPAM2_EL2 and MPAMHCR_EL2 writes in finalise_el2_state and leaves the ARM64_MPAM cpucap unset. Where EL3 firmware has cleared MPAM3_EL3.TRAPLOWER, the EL2 trap controls are left unwritten, at reset values that are UNKNOWN, and KVM still hides MPAM from the guest but no longer enables the traps that stop a guest from using it. KVM never saves or restores MPAM0_EL1 and MPAM1_EL1, so what one guest writes reaches the next guest and the host. Nor can the kernel make the EL2 writes unconditionally: they trap to EL3 on the firmware the option exists for, and TRAPLOWER cannot be read below EL3. Say so in mpam.rst, and add the rule and a pointer to the kernel-parameters entry. Suggested-by: Ben Horgan <ben.horgan@arm.com> Link: https://lore.kernel.org/all/CA+EHjTxeWxZiuSmnKLGLxTBXP4oJT7-LuffbPAyCSZZ5TW=5Ew@mail.gmail.com/ (local) Signed-off-by: Fuad Tabba <fuad.tabba@linux.dev> --- Notes: Changes since v1, the first three from Ben Horgan's review: - Put arm64.nompam under a new "Command line parameters" section. - Separate MPAM3_EL3.MPAMEN from TRAPLOWER, which v1 conflated. - Add that KVM does not save or restore MPAM0_EL1 and MPAM1_EL1. - Drop "No functional change intended." from the commit message. Bradley Morgan's Reviewed-by on v1 is not carried over: both paragraphs, the section heading and the commit message changed.
Still LGTM, the only arm device I own is pixel 7, and also a modern arm test-peoples-crap box. So from what I recall, my tag stands
quoted hunk ↗ jump to hunk
v1: https://lore.kernel.org/all/20260903084809.2027326-1-fuad.tabba@linux.dev/ (local) .../admin-guide/kernel-parameters.txt | 3 ++- Documentation/arch/arm64/mpam.rst | 25 +++++++++++++++++++ 2 files changed, 27 insertions(+), 1 deletion(-)diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 68647ff4bdd24..e6d543de3cde5 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt@@ -575,7 +575,8 @@ Kernel parametersSet instructions support arm64.nompam [ARM64] Unconditionally disable Memory Partitioning And - Monitoring support + Monitoring support. Only for a machine that does not + boot without it. See Documentation/arch/arm64/mpam.rst arm64.nomte [ARM64] Unconditionally disable Memory Tagging Extension supportdiff --git a/Documentation/arch/arm64/mpam.rst b/Documentation/arch/arm64/mpam.rst index 67fe515ed501c..e66b1359d1282 100644 --- a/Documentation/arch/arm64/mpam.rst +++ b/Documentation/arch/arm64/mpam.rst@@ -87,6 +87,31 @@ The supported features are: MBWU monitors can be exposed to the user after support for more monitoring scopes is added to resctrl. +Command line parameters +======================= + +arm64.nompam +------------ +Firmware controls MPAM through two bits of MPAM3_EL3. MPAMEN enables +it: while set, the PARTID and PMG in the MPAMn_ELx registers label the +CPU's memory requests. TRAPLOWER, which resets to 1, traps accesses to +the MPAM system registers from the lower exception levels to EL3. +Firmware must clear it, or handle the trap and emulate MPAM as disabled. +Where it does neither, the CPUs still advertise MPAM in the ID registers, +the kernel's MPAM register accesses trap to EL3, and the boot fails. +``arm64.nompam`` exists for that firmware: it makes the kernel treat the +CPUs as not implementing MPAM, so no MPAM system register is accessed. +Set it only on a machine that does not boot without it. + +It is not a way to turn MPAM off. Where firmware has cleared TRAPLOWER, +the option leaves the trap controls in MPAM2_EL2 and MPAMHCR_EL2 +unwritten, and their reset values are UNKNOWN. KVM still hides MPAM from +guests but no longer enables the traps that stop a guest from using it, +so a guest may be able to read and write MPAM0_EL1 and MPAM1_EL1. KVM +does not save or restore them, so what one guest writes is still there +when the next guest runs on that CPU, and when the host does. With MPAMEN +set, EL0 and EL1 requests then carry that PARTID and PMG. +Reporting Bugs ============== If you are not seeing the counters or controls you expect please share the
--- Thanks!https://lore.kernel.org/all/EE579805-42F2-4C58-B752-F28779EEB717@grrlz.net/ (local)