Hi,
I tested both patches independently:
- Patch 1 alone (DMA mask): NPU reports version 0.0 - probe fails.
The streaming mask is correct but 24-byte buffers still bounce
through swiotlb, and the NPU can't write to that address range.
I guess we need to understand why swiotlb bounce buffers are not working
here since these are valid address where the device should be capable of
performing DMA ops.
Adding Airoha folks in the loop. Any input on this?
- Patch 2 alone (cacheline buffers): NPU reports version 0.1111 -
works. Cache-line-aligned allocations bypass swiotlb entirely.
I guess this is just a workaround for this particular case.
Regards,
Lorenzo
So patch 2 is the essential fix, but patch 1 is still good to have as
a defensive measure - without a proper streaming DMA mask, any
future sub-cacheline streaming mapping would silently break.
Dan
sob., 22 sie 2026 o 21:27 Jakub Kicinski [off-list ref] napisał(a):
quoted
On Thu, 20 Aug 2026 10:59:40 +0200 Daniel Pawlik wrote:
quoted
The driver calls dma_set_coherent_mask() but never dma_set_mask(),
leaving the streaming DMA mask at the bus default. On the non-coherent
EN7581 platform (Cortex-A53), this causes the NPU mailbox to hang
after approximately 41 calls when using streaming DMA mappings.
Can you confirm if patch 2 is still needed after this fix?
--
Z poważaniem,
Daniel Pawlik