The bcm2712 SoC in the Raspberry Pi 5 has a standard
arm performance management unit that aligns with the
Cortex-A76 cores that are in the SoC so add the details
in so it can be used.
Signed-off-by: Peter Robinson <redacted>
Cc: Florian Fainelli <florian.fainelli@broadcom.com>
Cc: Dave Stevenson <dave.stevenson@raspberrypi.com
---
arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
index 9b36ecd7bba54..ae1fc9d728c00 100644
--- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
@@ -10,6 +10,15 @@ / {
interrupt-parent = <&gicv2>;
+ arm-pmu {
+ compatible = "arm,cortex-a76-pmu";
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+ };
+
clocks {
/* The oscillator is the root of the clock tree. */
clk_osc: clk-osc {--
2.55.0