[PATCH v2 1/2] dt-bindings: gpio: Add Axiado SGPIO controller

@@ -0,0 +1,118 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/axiado,sgpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Axiado SGPIO Controller
+
+maintainers:
+  - Petar Stepanovic <pstepanovic@axiado.com>
+  - SriNavmani A <srinavmani@axiado.com>
+  - Prasad Bolisetty <pbolisetty@axiado.com>
+
+description: |
+  The Axiado SGPIO controller provides a serial GPIO expansion interface
+  that multiplexes multiple GPIO signals over a small set of physical lines.
+
+  The controller operates as a shift-based interface, where output values
+  are serialized on a data output line and input values are sampled from a
+  data input line in synchronization with a shift clock. A latch signal is
+  used to update output states after each transfer cycle.
+
+  The interface uses data output (DOUT), data input (DIN), shift clock
+  (SCLK), and latch signal (LATCH).
+
+  Each SGPIO position provides one fixed-direction input GPIO and one
+  fixed-direction output GPIO. Input GPIOs support edge-triggered
+  interrupts.
+
+  GPIOs are organized in banks of 32 signals, with registers controlling
+  output values, input sampling, and interrupt status. The number of GPIO
+  lines depends on the hardware variant.
+
+  The controller detects changes on input GPIOs. Interrupt events are
+  aggregated and signaled through a single interrupt line to the parent
+  interrupt controller.
+
+  Register access is performed over the APB bus. The SGPIO shift clock is
+  derived from the APB clock using a programmable divider.
+
+properties:
+  compatible:
+    enum:
+      - axiado,ax3000-sgpio
+      - axiado,ax3005-sgpio
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    description:
+      APB clock used for register access and SGPIO shift clock generation
+    maxItems: 1
+
+  bus-frequency:
+    description: SGPIO shift clock frequency in Hz
+    minimum: 1
+
+  gpio-controller: true
+
+  '#gpio-cells':
+    const: 2
+
+  interrupt-controller: true
+
+  '#interrupt-cells':
+    const: 2
+
+  interrupts:
+    maxItems: 1
+
+  ngpios:
+    description:
+      Number of SGPIO positions. Each position provides one input GPIO and
+      one output GPIO.
+    enum: [128, 512]
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          const: axiado,ax3000-sgpio
+    then:
+      properties:
+        ngpios:
+          const: 128
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - bus-frequency
+  - gpio-controller
+  - '#gpio-cells'
+  - interrupt-controller
+  - '#interrupt-cells'
+  - interrupts
+  - ngpios
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    sgpio@a000 {
+        compatible = "axiado,ax3005-sgpio";
+        reg = <0xa000 0x800>;
+        clocks = <&apb_clk>;
+        bus-frequency = <1000000>;
+        gpio-controller;
+        #gpio-cells = <2>;
+        interrupt-controller;
+        #interrupt-cells = <2>;
+        interrupt-parent = <&gpio6>;
+        interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
+        ngpios = <128>;
+    };

@@ -4407,6 +4407,14 @@ S:	Orphan
 F:	Documentation/devicetree/bindings/sound/axentia,*
 F:	sound/soc/atmel/tse850-pcm5142.c
 
+AXIADO SGPIO DRIVER
+M:	Petar Stepanovic <pstepanovic@axiado.com>
+M:	SriNavmani A <srinavmani@axiado.com>
+M:	Prasad Bolisetty <pbolisetty@axiado.com>
+L:	linux-gpio@vger.kernel.org
+S:	Supported
+F:	Documentation/devicetree/bindings/gpio/axiado,sgpio.yaml
+
 AXIS ARTPEC ARM64 SoC SUPPORT
 M:	Jesper Nilsson <jesper.nilsson@axis.com>
 M:	Lars Persson <lars.persson@axis.com>