Re: [RFC PATCH 00/36] arm64: Add support for FEAT_NMI
From: Vladimir Murzin <hidden>
Date: 2026-07-14 10:32:30
Possibly related (same subject, not in this thread)
- 2026-07-14 · Re: [RFC PATCH 00/36] arm64: Add support for FEAT_NMI · Jinjie Ruan <hidden>
- 2026-07-09 · [RFC PATCH 00/36] arm64: Add support for FEAT_NMI · Vladimir Murzin <hidden>
On 7/14/26 10:00, Jinjie Ruan wrote:
On 7/14/2026 4:37 PM, Jinjie Ruan wrote:quoted
Hi, Vladimir, On QEMU, if the CPU supports FEAT_NMI but gic-version=2, the kernel panic as following: [ 0.000000] CPU features: detected: HCRX_EL2 register [ 0.000000] CPU features: detected: Non-maskable Interrupts [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI) [ 0.000000] CPU features: detected: ARM erratum 845719 [ 0.000000] alternatives: applying boot alternatives [ 0.000000] Kernel command line: root=/dev/vda rw console=ttyAMA0 kgdboc=ttyAMA0,115200 earlycon preempt=full irqchip.gicv3_pseudo_nmi=0 0 [ 0.000000] Unknown kernel command line parameters "preempt=full", will be passed to user space. [ 0.000000] printk: log buffer data + meta data: 131072 + 458752 = 589824 bytes [ 0.000000] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear) [ 0.000000] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes, linear) [ 0.000000] software IO TLB: area num 8. [ 0.000000] software IO TLB: mapped [mem 0x00000000e4000000-0x00000000e8000000] (64MB) [ 0.000000] Fallback order for Node 0: 0 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 3145728 [ 0.000000] Policy zone: Normal [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1 [ 0.000000] Running RCU self tests [ 0.000000] Running RCU synchronous self tests [ 0.000000] rcu: Preemptible hierarchical RCU implementation. [ 0.000000] rcu: RCU event tracing is enabled. [ 0.000000] rcu: RCU lockdep checking is enabled. [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=512 to nr_cpu_ids=8. [ 0.000000] Trampoline variant of Tasks RCU enabled. [ 0.000000] Tracing variant of Tasks RCU enabled. [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies. [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8 [ 0.000000] Running RCU synchronous self tests [ 0.000000] RCU Tasks: Setting shift to 3 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=8. [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 [ 0.000000] Root IRQ handler: gic_handle_irq [ 0.000000] ------------[ cut here ]------------ [ 0.000000] Could not request IRQ 4 as NMI, err=-22 [ 0.000000] WARNING: arch/arm64/kernel/smp.c:1103 at set_smp_ipi_range_percpu+0x2c0/0x31c, CPU#0: swapper/0/0 [ 0.000000] Modules linked in: [ 0.000000] CPU: 0 UID: 0 PID: 0 Comm: swapper/0 Not tainted 7.2.0-rc1-00036-g6fbe132d3a74-dirty #353 PREEMPT [ 0.000000] Hardware name: linux,dummy-virt (DT) [ 0.000000] pstate: 600000c5 (nZCv daIF -ALLINT -PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 0.000000] pc : set_smp_ipi_range_percpu+0x2c0/0x31c [ 0.000000] lr : set_smp_ipi_range_percpu+0x2c0/0x31c [ 0.000000] sp : ffffffdadd5d3b90 [ 0.000000] x29: ffffffdadd5d3b90 x28: 0000000000102200 x27: ffffffdadc1e49a0 [ 0.000000] x26: ffffff82fe7a7008 x25: 0000000000000008 x24: 0000000000000004 [ 0.000000] x23: ffffffdadd5e4078 x22: ffffffdadc9340c8 x21: ffffffdadc92c470 [ 0.000000] x20: 0000000000000003 x19: ffffffdadd5e02b0 x18: 00000000ffffffff [ 0.000000] x17: 20313d7473756a64 x16: 615f62635f6b7361 x15: ffffffdb5d5d37b7 [ 0.000000] x14: 0000000000000000 x13: ffffffdadd60aaa8 x12: 0000000000000041 [ 0.000000] x11: 00000000000000c3 x10: ffffffdadd67aa90 x9 : ffffffdadd60aaa8 [ 0.000000] x8 : 3ffffffffffff000 x7 : 0000000000000001 x6 : 0000000000000001 [ 0.000000] x5 : ffffffdadd662aa8 x4 : 0000000000000000 x3 : 0000000000000000 [ 0.000000] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffffffdadd5eb780 [ 0.000000] Call trace: [ 0.000000] set_smp_ipi_range_percpu+0x2c0/0x31c (P) [ 0.000000] __gic_init_bases+0x138/0x148 [ 0.000000] gic_of_init+0x88/0x3ec [ 0.000000] of_irq_init+0x1bc/0x458 [ 0.000000] irqchip_init+0x18/0x40 [ 0.000000] init_IRQ+0xa8/0x218 [ 0.000000] start_kernel+0x550/0xa98 [ 0.000000] __primary_switched+0x88/0x90 [ 0.000000] Kernel panic - not syncing: kernel: panic_on_warn set ... [ 0.000000] CPU: 0 UID: 0 PID: 0 Comm: swapper/0 Not tainted 7.2.0-rc1-00036-g6fbe132d3a74-dirty #353 PREEMPT [ 0.000000] Hardware name: linux,dummy-virt (DT) [ 0.000000] Call trace: [ 0.000000] show_stack+0x18/0x24 (C) [ 0.000000] dump_stack_lvl+0x18c/0x1d4 [ 0.000000] dump_stack+0x18/0x24 [ 0.000000] vpanic+0x590/0x594 [ 0.000000] do_panic_on_target_cpu+0x0/0x1c [ 0.000000] check_panic_on_warn+0x8c/0x9c [ 0.000000] __warn+0xa0/0x2cc [ 0.000000] __report_bug+0xe0/0x19c [ 0.000000] report_bug+0x50/0x10c [ 0.000000] bug_brk_handler+0x24/0x70 [ 0.000000] call_el1_break_hook+0x6c/0xc8 [ 0.000000] do_el1_brk64+0x24/0x4c [ 0.000000] el1_brk64+0x38/0x64 [ 0.000000] el1h_64_sync_handler+0xa8/0x134 [ 0.000000] el1h_64_sync+0x80/0x84 [ 0.000000] set_smp_ipi_range_percpu+0x2c0/0x31c (P) [ 0.000000] __gic_init_bases+0x138/0x148 [ 0.000000] gic_of_init+0x88/0x3ec [ 0.000000] of_irq_init+0x1bc/0x458 [ 0.000000] irqchip_init+0x18/0x40 [ 0.000000] init_IRQ+0xa8/0x218 [ 0.000000] start_kernel+0x550/0xa98 [ 0.000000] __primary_switched+0x88/0x90 [ 0.000000] ---[ end Kernel panic - not syncing: kernel: panic_on_warn set ... ]---Hi Vladimir, Even if PE supports FEAT_NMI, the GIC may not be able to generate a super-priority interrupt. The following patch can fix it, we should use gic_supports_v3_3_nmi() instead of system_uses_nmi() in ipi_should_be_nmi() because the GIC.
Thanks for the report! I think it would be better for me to spend some time making the arch IPI code tolerate both the presence and absence of NMI support, perhaps similar to how perf handles this, rather than creating a strong dependency between the architecture code and the interrupt controller. At least, I’ll give that a try!
One more small suggestion: gic_data.has_nmi is a very important piece of information, and we should print it out, as some versions of GICv3 hardware may not support FEAT_GICv3_NMI.
I'll have a look, thanks!
quoted hunk
Best regards, Jinjie--- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c@@ -1035,7 +1035,7 @@ static void smp_cross_call(const struct cpumask*target, unsigned int ipinr) static bool ipi_should_be_nmi(enum ipi_msg_type ipi) { - if (!system_uses_nmi() && !system_uses_irq_prio_masking()) + if (!gic_supports_v3_3_nmi() && !system_uses_irq_prio_masking()) return false; switch (ipi) { /*@@ -2124,6 +2126,8 @@ static int __init gic_init_bases(phys_addr_tdist_phys_base, gic_data.has_rss = !!(typer & GICD_TYPER_RSS); gic_data.has_nmi = !!(typer & GICD_TYPER_NMI); + pr_info("GICv3 Non-maskable interrupt property %s supported\n", + gic_data.has_nmi ? "is" : "not"); if (typer & GICD_TYPER_MBIS) { err = mbi_init(handle, gic_data.domain);diff --git a/include/linux/irqchip/arm-gic-v3.hb/include/linux/irqchip/arm-gic-v3.h index ebccd76cadda..6bf73e7b9600 100644--- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h@@ -661,6 +661,7 @@ static inline bool gic_enable_sre(void) return !!(val & ICC_SRE_EL1_SRE); } +bool gic_supports_v3_3_nmi(void); #endif
Cheers Vladimir