Thread (6 messages) 6 messages, 3 authors, 1d ago
WARM1d

[PATCH v2 0/2] arm64: dts: rockchip: Add LCKFB Taishan Pi 3M

From: Liu Changjie <hidden>
Date: 2026-07-14 06:53:31
Also in: linux-devicetree, linux-rockchip, lkml

Add the compatible and device tree for the LCKFB Taishan Pi 3M, an
RK3576 board. The device tree is based on the published board
schematics and only enables interfaces exercised on the hardware.

This series depends on the separate net-next series:
  [PATCH net-next 0/2] net: phy: Add Maxio MAE0621A support

The Maxio driver is required to select the PHY's 125 MHz CLKOUT for the
RK3576 GMAC reference-clock input. A generic Clause 22 PHY negotiated a
1 Gbit/s link but did not provide a working data path with the PHY's
default CLKOUT configuration.

Changes in v2:
- Rebase from v7.1-rc2 to linux-rockchip for-next commit
  8017cf28e756 ("Merge branch 'v7.3-armsoc/dts64' into for-next").
- Keep the board compatible and Rob Herring's Acked-by on the binding.
- Add the published schematic link to the DTS commit message.
- Correct RK806 rail names and input supplies. Retain PLDO6 because
  VCCA1V8_PLDO6_S3 supplies the RK806 VCCIO pin and must remain on in
  S3. R4 is an unpopulated reserved path to OSC_AVDD1V8 and is not used
  to justify the rail; OSC_AVDD1V8 is supplied from VCC_1V8_PLL_S0
  through populated R3. Drop the bogus HDMI regulator and model the
  FRL level-shifter GPIO on HDMI.
- Add the SARADC recovery key and use VCCA_1V8_PLDO2_S0 as its reference.
- Add HYM8563, its interrupt and 32.768 kHz clock consumers.
- Use VCC_3V3_S0 directly for the SD card, document that SDMMC0_PWREN is
  not connected, and add the eMMC supplies explicitly.
- Add GMAC0 and MAE0621A with RGMII clock input, reset timing and the
  validated 125 MHz CLKOUT setting from the dependent PHY series.
- Describe each USB Type-A connector and its VBUS supply, and remove all
  added DWC3 quirks and the incorrect PHY supply.
- Restrict USB-C to its wired source/host roles, remove sink PDOs and
  VBUS sensing, and use the current connector port graph. Device role
  and DisplayPort Alt Mode are not claimed.
- Add and test the mSATA function of the miniPCIe socket, HDMI video and
  audio, and AP6256 Wi-Fi and Bluetooth.
- Add UART6 RTS/CTS for Bluetooth and remove redundant pinctrl and
  dr_mode properties already supplied by rk3576.dtsi.
- Limit SDIO to the validated 100 MHz SDR104 rate.
- Do not add local FIT boot arguments to the upstream DTS.

The ES8388 analog audio path is deferred because it has not been tested.
The socket's PCIe function is also deferred; this revision only describes
and tests the mSATA wiring selected on this board.

USB validation dependencies and boundaries:
- USB-C source/host tests in both orientations used a validation kernel
  with the 36-patch USBDP cleanup v11 series applied:
  [ref].
  That kernel also carried local validation follow-ups for power-state
  handling, orientation reinitialization and a USB-only state. The board
  DTS itself uses the current, single-port USBDP binding.
- USB 3.0 Type-A tests used the separately proposed linux-phy patch
  "phy: rockchip: naneng-combphy: Set RK3576 USB3 SSC downward", based on
  linux-phy next commit dc59e4fea9d8. A final-stack A/B test changed only
  those five lines: without them the same MD202 failed USB addressing with
  error -71; with them it enumerated at 5 Gbit/s and completed the 64 MiB
  read/write test used for board validation. USB 2.0 did not depend on it.
- A new 1 GiB stress test exposed SuperSpeed resets and I/O timeouts with
  the RTL9210-based MD202 even after the SSC-direction fix. The USB 3.0
  claim is therefore limited to the enumerating and 64 MiB functional test
  above; sustained-I/O stability with this enclosure is not claimed.

Hardware tests:
- eMMC HS400ES, SD card read/write, and read-only mSATA access
- HYM8563 raw I2C register access and recovery-key input events
- 1GbE ping, bidirectional iperf3, link unplug/replug and reboot
- USB 2.0 Type-A storage; USB 3.0 Type-A 5 Gbit/s enumeration and 64 MiB
  storage I/O; USB-C host with the validation dependencies described above
- HDMI 1080p video capture and stereo audio capture
- AP6256 2.4/5 GHz scan, WPA2 association, ping and bidirectional
  throughput; Bluetooth firmware load and HCI bring-up. Active discovery
  was additionally exercised during bring-up.
- UART0 and a normal reboot with no panic, oops, SError or storage error

Static tests:
- git diff --check
- dt_binding_check with dtschema 2026.6
- CHECK_DTBS=y and W=1 Image, modules and target DTB builds with GCC 10.3
- checkpatch.pl and a fresh five-patch git-am check with both dependencies

The board series by itself produces an expected dtbs_check warning for
maxio,clk-out-frequency-hz until the dependent Maxio binding is applied.
On the combined tree, the only remaining target-DTB message is the
pre-existing missing schema for rockchip,rk3576-edp.

Link: https://lore.kernel.org/r/MN0PR19MB6091C07C729B83E594722E84AC3C2@MN0PR19MB6091.namprd19.prod.outlook.com (local) [v1 1/2]
Link: https://lore.kernel.org/r/MN0PR19MB6091AA2B594F0E026518E884AC3C2@MN0PR19MB6091.namprd19.prod.outlook.com (local) [v1 2/2]
Link: https://lore.kernel.org/r/CABjd4YzNQCwtxz+v474vrS0fCO2AZz+bNCQ+4F5afTeAUpad7A@mail.gmail.com (local) [review]
Link: https://lore.kernel.org/r/MN0PR19MB609171877109E10553B5DB5EACF92@MN0PR19MB6091.namprd19.prod.outlook.com (local) [COMBPHY dependency]
Link: https://lore.kernel.org/r/MN0PR19MB6091CD5A84D2DA5DACF434DAACF92@MN0PR19MB6091.namprd19.prod.outlook.com (local) [Maxio PHY dependency]

Liu Changjie (2):
  dt-bindings: arm: rockchip: Add LCKFB Taishan Pi 3M
  arm64: dts: rockchip: Add LCKFB Taishan Pi 3M

 .../devicetree/bindings/arm/rockchip.yaml     |   5 +
 arch/arm64/boot/dts/rockchip/Makefile         |   1 +
 .../dts/rockchip/rk3576-lckfb-tspi-3m.dts     | 984 ++++++++++++++++++
 3 files changed, 990 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-lckfb-tspi-3m.dts


base-commit: 8017cf28e756cd0f6988706b5d33bdf4eccf4844
-- 
2.55.0
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