[PATCH v3 6/6] arm64: dts: ti: k3-j742s2-ti-ipc-firmware: Reserve memory for LPM metadata
From: "Richard Genoud (TI)" <richard.genoud@bootlin.com>
Date: 2026-07-03 14:37:51
Also in:
linux-devicetree, lkml
Subsystem:
arm/texas instruments k3 architecture, the rest · Maintainers:
Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Linus Torvalds
Declare a carveout memory region to store LPM metadata on J742S2. For Jacinto devices, this memory region is needed for saving ATF context and the certificate information of ATF and OPTEE and DM image. This LPM metadata area is firewalled to be accessed only by TIFS. U-Boot R5 SPL/TIFS will use this area to save and restore: - ATF context - ATF certificate information - OPTEE certificate information - DM image (which has been copied in memory at boot time by U-Boot R5-SPL) At resume, U-Boot R5 SPL is executed and detects that the board is resuming (with a flag set in the PMIC), then it: - brings out of retention the DDR - retrieves the LPM memory region from DTS - authenticates certificates from LPM memory region and applies firewalls - asks TIFS to restore TFA and its own minimal context - starts TFA on remote proc - loads back DM image from memory and jumps to DM https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/pm/lpm.html#lpm-msg-lpm-save-addr As this is used by U-Boot SPL, bootph-pre-ram is added and the device is enabled. NB: This memory region is not part of DM memory (which is not retained at suspend) Signed-off-by: Prasanth Babu Mantena <redacted> Signed-off-by: Richard Genoud (TI) <richard.genoud@bootlin.com> --- arch/arm64/boot/dts/ti/k3-j742s2-evm.dts | 2 ++ .../dts/ti/k3-j742s2-ti-ipc-firmware.dtsi | 24 +++++++++++++++++++ 2 files changed, 26 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j742s2-ti-ipc-firmware.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts b/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts
index fcb7f05d7faf..583b672ef8e9 100644
--- a/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts@@ -24,3 +24,5 @@ memory@80000000 { bootph-all; }; }; + +#include "k3-j742s2-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-j742s2-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j742s2-ti-ipc-firmware.dtsi
new file mode 100644
index 000000000000..d66bcd2f4e19
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j742s2-ti-ipc-firmware.dtsi@@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/** + * Device Tree Source for enabling IPC using TI SDK firmware on J42S2 SoCs + * + * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2026 Bootlin + */ + +&reserved_memory { + lpm_memory_region: memory@ab000000 { + reg = <0x00 0xab000000 0x00 0x00300000>; + no-map; + bootph-pre-ram; + }; +}; + +&mcu_r5fss0_core0 { + memory-region = <&mcu_r5fss0_core0_dma_memory_region>, + <&mcu_r5fss0_core0_memory_region>, + <&lpm_memory_region>; + memory-region-names = "dma", "firmware", "lpm-metadata"; + bootph-pre-ram; + status = "okay"; +};
--
2.47.3