[PATCH 09/18] arm64: dts: ti: k3-j721e-sk: Add overlay for fusion application daughter board
From: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Date: 2026-07-02 09:33:14
Also in:
imx, linux-devicetree, lkml
Subsystem:
arm/texas instruments k3 architecture, the rest · Maintainers:
Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Linus Torvalds
From: Vaishnav Achath <redacted> Fusion application daughter board [1] can be used to connect multiple FPDLink-III based sensors to TI EVMs. The board has two DS90UB960 deserializers, each of which aggregates input from up to 4x FPDLink-III sensors. Up to 8x sensors can simultaneously stream over the two CSI RX ports on J721E SK. CSI2RX connectivity on AM68-SK and AM69-SK is the same as that of J721E-SK, hence the same overlay can be reused. [1]: https://svtronics.com/product/fusion-application-daughter-board-evm577pfusion-v1-0/?srsltid=AfmBOooMsRAd5ibFOGJaKbjsC3j9-loTPK2wWqsqPq2Adj55g1nPluxX Signed-off-by: Vaishnav Achath <redacted> Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com> --- arch/arm64/boot/dts/ti/Makefile | 10 + .../dts/ti/k3-j721e-sk-fpdlink-fusion.dtso | 191 ++++++++++++++++++ 2 files changed, 201 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-sk-fpdlink-fusion.dtso
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 79ce2ff38cc3..b31bf2f305aa 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile@@ -148,6 +148,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-pcie0-ep.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-pcie1-ep.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk-csi2-dual-imx219.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk-fpdlink-fusion.dtbo # Boards with J721s2 SoC dtb-$(CONFIG_ARCH_K3) += k3-am68-phyboard-izar.dtb
@@ -268,8 +269,12 @@ k3-am68-sk-base-board-csi2-dual-imx219-dtbs := k3-am68-sk-base-board.dtb \ k3-j721e-sk-csi2-dual-imx219.dtbo k3-am68-sk-base-board-pcie1-ep-dtbs := k3-am68-sk-base-board.dtb \ k3-am68-sk-base-board-pcie1-ep.dtbo +k3-am68-sk-fpdlink-fusion-dtbs := k3-am68-sk-base-board.dtb \ + k3-j721e-sk-fpdlink-fusion.dtbo k3-am69-sk-csi2-dual-imx219-dtbs := k3-am69-sk.dtb \ k3-j721e-sk-csi2-dual-imx219.dtbo +k3-am69-sk-fpdlink-fusion-dtbs := k3-am69-sk.dtb \ + k3-j721e-sk-fpdlink-fusion.dtbo k3-am69-sk-pcie0-ep-dtbs := k3-am69-sk.dtb \ k3-am69-sk-pcie0-ep.dtbo k3-j7200-evm-pcie1-ep-dtbs := k3-j7200-common-proc-board.dtb \
@@ -284,6 +289,8 @@ k3-j721e-evm-pcie1-ep-dtbs := k3-j721e-common-proc-board.dtb \ k3-j721e-evm-pcie1-ep.dtbo k3-j721e-sk-csi2-dual-imx219-dtbs := k3-j721e-sk.dtb \ k3-j721e-sk-csi2-dual-imx219.dtbo +k3-j721e-sk-fpdlink-fusion-dtbs := k3-j721e-sk.dtb \ + k3-j721e-sk-fpdlink-fusion.dtbo k3-j721s2-evm-fpdlink-fusion-dtbs := k3-j721s2-evm.dtb \ k3-j721s2-evm-fusion.dtbo k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \
@@ -348,7 +355,9 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am68-phyboard-izar-peb-av-15.dtb \ k3-am68-sk-base-board-csi2-dual-imx219.dtb \ k3-am68-sk-base-board-pcie1-ep.dtb \ + k3-am68-sk-fpdlink-fusion.dtb \ k3-am69-sk-csi2-dual-imx219.dtb \ + k3-am69-sk-fpdlink-fusion.dtb \ k3-am69-sk-pcie0-ep.dtb \ k3-j7200-evm-pcie1-ep.dtb \ k3-j721e-common-proc-board-infotainment.dtb \
@@ -356,6 +365,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-j721e-evm-pcie0-ep.dtb \ k3-j721e-evm-pcie1-ep.dtb \ k3-j721e-sk-csi2-dual-imx219.dtb \ + k3-j721e-sk-fpdlink-fusion.dtb \ k3-j721s2-evm-fpdlink-fusion.dtb \ k3-j721s2-evm-pcie1-ep.dtb \ k3-j721s2-evm-usb0-type-a.dtb \
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk-fpdlink-fusion.dtso b/arch/arm64/boot/dts/ti/k3-j721e-sk-fpdlink-fusion.dtso
new file mode 100644
index 000000000000..dd82ec3accfe
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk-fpdlink-fusion.dtso@@ -0,0 +1,191 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * DT Overlay for Fusion (FPD-Link III) board on J721E SK, + * AM68 SK or AM69 SK. + * https://svtronics.com/portfolio/evm577pfusion-v1-0-fusion/ + * + * Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/gpio/gpio.h> + +&{/} { + clk_fusion_25M_fixed: fixed-clock-25M { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; +}; + + +&cam0_i2c { + #address-cells = <1>; + #size-cells = <0>; + + deser@3d { + compatible = "ti,ds90ub960-q1"; + reg = <0x3d>; + clocks = <&clk_fusion_25M_fixed>; + clock-names = "refclk"; + i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>; + + deserializer_0_ports: ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0{ + reg= <0>; + status = "disabled"; + }; + + port@1{ + reg= <1>; + status = "disabled"; + }; + + port@2{ + reg= <2>; + status = "disabled"; + }; + + port@3{ + reg= <3>; + status = "disabled"; + }; + + /* CSI-2 TX*/ + port@4 { + reg = <4>; + ds90ub960_0_csi_out: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + link-frequencies = /bits/ 64 <800000000>; + remote-endpoint = <&csi2_phy0>; + }; + }; + + port@5{ + reg= <5>; + status = "disabled"; + }; + }; + + deserializer_0_links: links { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + deser@36 { + compatible = "ti,ds90ub960-q1"; + reg = <0x36>; + clocks = <&clk_fusion_25M_fixed>; + clock-names = "refclk"; + i2c-alias-pool = <0x5a 0x5b 0x5c 0x5d 0x5e 0x5f>; + + deserializer_1_ports: ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0{ + reg= <0>; + status = "disabled"; + }; + + port@1{ + reg= <1>; + status = "disabled"; + }; + + port@2{ + reg= <2>; + status = "disabled"; + }; + + port@3{ + reg= <3>; + status = "disabled"; + }; + + /* CSI-2 TX*/ + port@4 { + reg = <4>; + ds90ub960_1_csi_out: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + link-frequencies = /bits/ 64 <800000000>; + remote-endpoint = <&csi2_phy1>; + }; + }; + + port@5{ + reg= <5>; + status = "disabled"; + }; + }; + + deserializer_1_links: links { + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&cdns_csi2rx0 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + csi0_port0: port@0 { + reg = <0>; + status = "okay"; + + csi2_phy0: endpoint { + remote-endpoint = <&ds90ub960_0_csi_out>; + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + link-frequencies = /bits/ 64 <800000000>; + + }; + }; + }; +}; + +&cdns_csi2rx1 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + csi1_port0: port@0 { + reg = <0>; + status = "okay"; + + csi2_phy1: endpoint { + remote-endpoint = <&ds90ub960_1_csi_out>; + bus-type = <4>; /* CSI2 DPHY */ + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + link-frequencies = /bits/ 64 <800000000>; + }; + }; + }; +}; + +&ti_csi2rx0 { + status = "okay"; +}; + +&dphy0 { + status = "okay"; +}; + +&ti_csi2rx1 { + status = "okay"; +}; + +&dphy1 { + status = "okay"; +};
--
2.34.1