Re: [PATCH v3 1/5] dt-bindings: display: verisilicon,dc: generalize for single-output variants
From: Joey Lu <hidden>
Date: 2026-06-08 09:44:05
Also in:
dri-devel, linux-devicetree, lkml
On 6/8/2026 4:00 PM, Krzysztof Kozlowski wrote:
On Mon, Jun 08, 2026 at 10:32:33AM +0800, Joey Lu wrote:quoted
The existing schema hard-codes the five-clock/three-reset/dual-port topology of the DC8200 IP block, preventing reuse for single-output variants such as the Verisilicon DCUltraLite used in the Nuvoton MA35D1 SoC. Rework the schema so that variant-specific constraints are expressed via allOf/if blocks: - Add nuvoton,ma35d1-dcu to the SoC-specific compatible enum. The generic verisilicon,dc fallback remains the driver-binding string. - Relax the top-level clocks/resets definitions to minItems ranges so the base schema accepts both variants. - Keep ports in the global required list and keep additionalProperties tightened to unevaluatedProperties. - Add an allOf/if block for thead,th1520-dc8200: five-clock (core, axi, ahb, pix0, pix1), three-reset (core, axi, ahb). - Add an allOf/if block for nuvoton,ma35d1-dcu: two-clock (core, pix0), one-reset (core). - Fix a stray space in the port@0 description. - Add a DT example for the Nuvoton MA35D1 DCU Lite using ports/port@0. Signed-off-by: Joey Lu <redacted> --- .../bindings/display/verisilicon,dc.yaml | 103 +++++++++++++++--- 1 file changed, 90 insertions(+), 13 deletions(-)diff --git a/Documentation/devicetree/bindings/display/verisilicon,dc.yaml b/Documentation/devicetree/bindings/display/verisilicon,dc.yaml index 9dc35ab973f2..db0260d874c5 100644 --- a/Documentation/devicetree/bindings/display/verisilicon,dc.yaml +++ b/Documentation/devicetree/bindings/display/verisilicon,dc.yaml@@ -17,7 +17,8 @@ properties: items: - enum: - thead,th1520-dc8200 - - const: verisilicon,dc # DC IPs have discoverable ID/revision registers + - nuvoton,ma35d1-dcu + - const: verisilicon,dc # DC IPs have discoverable ID/revision registersWhy do you need to change indentation? Why introducing irrelevant changes to the diff?
The extra space was introduced to satisfy `yamllint`'s "too few spaces before comment" warning, which requires two spaces before an inline `#`. Since this is an unrelated change that pollutes the diff, I will revert it to the original single-space form.
quoted
reg: maxItems: 1@@ -26,6 +27,7 @@ properties: maxItems: 1 clocks: + minItems: 2 items: - description: DC Core clock - description: DMA AXI bus clockThat's not true anymore. In such case the list should also be defined per variant and here only min/maxItems.
Understood. I will remove the `items:` description list from the top-level `clocks:` and keep only `minItems`/`maxItems`. The per-variant items descriptions will be moved into the allOf/if blocks.
quoted
@@ -34,24 +36,19 @@ properties: - description: Pixel clock of output 1 clock-names: - items: - - const: core - - const: axi - - const: ahb - - const: pix0 - - const: pix1 + minItems: 2 + maxItems: 5 resets: + minItems: 1 items: - description: DC Core reset - description: DMA AXI bus reset - description: Configuration AHB bus reset reset-names: - items: - - const: core - - const: axi - - const: ahbThis stays, with minItems. Variants only need min/maxItems
Understood. I will restore the top-level `clock-names` and `reset-names` items lists and add `minItems` to each. The per-variant allOf blocks will only carry `minItems`/`maxItems`.
quoted
+ minItems: 1 + maxItems: 3 ports: $ref: /schemas/graph.yaml#/properties/ports@@ -59,7 +56,7 @@ properties: properties: port@0: $ref: /schemas/graph.yaml#/properties/port - description: The first output channel , endpoint 0 should be + description: The first output channel, endpoint 0 should be used for DPI format output and endpoint 1 should be used for DP format output.@@ -77,7 +74,60 @@ required: - clock-names - ports -additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + const: thead,th1520-dc8200 + then: + properties: + clocks: + minItems: 5 + maxItems: 5 + + clock-names: + items: + - const: core + - const: axi + - const: ahb + - const: pix0 + - const: pix1 + + resets: + minItems: 3 + maxItems: 3 + + reset-names:minItems: 3
Understood. I will add `minItems: 3` to `reset-names` in the thead,th1520-dc8200 block.
quoted
+ items: + - const: core + - const: axi + - const: ahb + + - if: + properties: + compatible: + contains: + const: nuvoton,ma35d1-dcu + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: core + - const: pix0 + + resets: + maxItems: 1 + + reset-names:maxItems: 1
Understood. I will add `maxItems: 1` to `reset-names` in the nuvoton block.
quoted
+ items: + - const: core + +unevaluatedProperties: falseStop making random changes to the binding. Best regards, Krzysztof
Understood. I will revert to `additionalProperties: false` as in the original binding. Many thanks!