Re: [PATCH 1/3] dt-bindings: soc: realtek: Add Realtek DHC I/O level detector
From: Krzysztof Kozlowski <krzk@kernel.org>
Date: 2026-06-04 12:49:26
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On 04/06/2026 13:18, Yu-Chun Lin wrote:
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From: Tzuyi Chang <redacted> Add device tree binding documentation for the Realtek DHC I/O level detector. This hardware block is responsible for detecting the I/O signaling levels (e.g., 1.8V or 3.3V) of various interfaces (RGMII, SDIO, eMMC, etc.) and applying the corresponding pad configurations via pinctrl states. Signed-off-by: Tzuyi Chang <redacted> Signed-off-by: Yu-Chun Lin <eleanor.lin@realtek.com> --- .../realtek/realtek,rtd1625-io-detect.yaml | 77 +++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/realtek/realtek,rtd1625-io-detect.yamldiff --git a/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1625-io-detect.yaml b/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1625-io-detect.yaml new file mode 100644 index 000000000000..badf27212dfd --- /dev/null +++ b/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1625-io-detect.yaml@@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2026 Realtek Semiconductor Corporation +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/realtek/realtek,rtd1625-io-detect.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek DHC I/O Level Detector + +maintainers: + - Tzuyi Chang <tychang@realtek.com> + +description: |
Drop |
+ The Realtek DHC I/O Level Detector is a hardware block that detects I/O + signaling levels (such as 1.8V or 3.3V) to determine the correct pad + configurations for specific IP blocks. + +properties: + compatible: + const: realtek,rtd1625-io-detect +
No resources here, so does not look like a real device, but driver instantiation.
+ pinctrl-names: + items: + - const: rgmii_1v8 + - const: rgmii_3v3 + - const: sdio_1v8 + - const: sdio_3v3 + - const: csi_1v8 + - const: csi_3v3 + - const: sd_1v8 + - const: sd_3v3 + - const: uart1_1v8 + - const: uart1_3v3 + - const: aio_1v8 + - const: aio_3v3 + - const: emmc_1v8 + - const: emmc_3v3 + + realtek,iso-pinctrl: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Pinctrl phandle containing I/O detection registers.
MMIO registers are in 'reg' property.
+ +required: + - compatible + - pinctrl-names + - realtek,iso-pinctrl
Best regards, Krzysztof