Hi Andy,

On 6/1/26 7:06 AM, Andy Yan wrote:

Hello,

On 4/26/26 08:20, Cristian Ciocaltea wrote:

quoted

Enable HDMI 2.0 display modes (e.g. 4K@60Hz) by adding SCDC management
for the high TMDS clock ratio and scrambling, required when the TMDS
character rate exceeds the 340 MHz HDMI 1.4b limit.

A periodic work item monitors the sink's scrambling status to recover
from sink-side resets.  On hotplug detect, if SCDC scrambling state is
out of sync with the driver, trigger a CRTC reset to re-establish the
link.

Reject modes requiring TMDS rates above 600 MHz, as those fall in the
HDMI 2.1 FRL domain which is not supported. In no_hpd configurations,
further restrict to 340 MHz since SCDC requires a connected sink.

Tested-by: Diederik de Haas <redacted>
Tested-by: Maud Spierings <redacted>
Signed-off-by: Cristian Ciocaltea <redacted>
---
  drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 188 ++++++++++++++++++++++++---
  1 file changed, 172 insertions(+), 16 deletions(-)

[...]

quoted

  }
    static const struct drm_edid *

@@ -832,12 +986,12 @@ dw_hdmi_qp_bridge_tmds_char_rate_valid(const struct drm_bridge *bridge,
  {
      struct dw_hdmi_qp *hdmi = bridge->driver_private;
  -    /*
-     * TODO: when hdmi->no_hpd is 1 we must not support modes that
-     * require scrambling, including every mode with a clock above
-     * HDMI14_MAX_TMDSCLK.
-     */
-    if (rate > HDMI14_MAX_TMDSCLK) {

The locally defined HDMI14_MAX_TMDSCLK has been removed, we should now use
HDMI_1_3_CHAR_RATE_MAX, and I think we should apply the same change to
HDMI20_MAX_TMDSRATE

Yep, already addressed in my local dev branch.  Please note this revision is
obsolete, there's already v6 available and I'm going to submit v7 a bit later
today.

Thanks,
Cristian