[PATCH v3 09/10] dt-bindings: firmware: add arm,ras-cper
From: Ahmed Tiba <hidden>
Date: 2026-03-18 20:49:30
Also in:
linux-acpi, linux-cxl, linux-devicetree, linux-doc
Subsystem:
open firmware and flattened device tree bindings, the rest · Maintainers:
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Describe the DeviceTree node that exposes the Arm firmware-first CPER provider and hook the file into MAINTAINERS so the binding has an owner. Signed-off-by: Ahmed Tiba <redacted> --- .../devicetree/bindings/firmware/arm,ras-cper.yaml | 71 ++++++++++++++++++++++ MAINTAINERS | 5 ++ 2 files changed, 76 insertions(+)
diff --git a/Documentation/devicetree/bindings/firmware/arm,ras-cper.yaml b/Documentation/devicetree/bindings/firmware/arm,ras-cper.yaml
new file mode 100644
index 000000000000..bd93cfb8d222
--- /dev/null
+++ b/Documentation/devicetree/bindings/firmware/arm,ras-cper.yaml@@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/arm,ras-cper.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Arm RAS CPER provider + +maintainers: + - Ahmed Tiba <ahmed.tiba@arm.com> + +description: | + Arm Reliability, Availability and Serviceability (RAS) firmware can expose + a firmware-first CPER error source directly via DeviceTree. Firmware + provides the CPER Generic Error Status block and notifies the OS through + an interrupt. + +properties: + compatible: + const: arm,ras-cper + + reg: + minItems: 1 + items: + - description: + CPER Generic Error Status block exposed by firmware + - description: + Optional 32- or 64-bit doorbell register used on platforms + where firmware needs an explicit "ack" handshake before overwriting + the CPER buffer. Firmware watches bit 0 and expects the OS to set it + once the current status block has been consumed. + + interrupts: + maxItems: 1 + description: + Interrupt used to signal that a new status record is ready. + + memory-region: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Optional phandle to the reserved-memory entry that backs the status + buffer so firmware and the OS use the same carved-out region. + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ras_cper_buffer: cper@fe800000 { + reg = <0x0 0xfe800000 0x0 0x1000>; + no-map; + }; + }; + + error-handler@fe800000 { + compatible = "arm,ras-cper"; + reg = <0xfe800000 0x1000>, + <0xfe810000 0x4>; + memory-region = <&ras_cper_buffer>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + }; +...
diff --git a/MAINTAINERS b/MAINTAINERS
index 96ea84948d76..69756fb61a98 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS@@ -22009,6 +22009,11 @@ M: Alexandre Bounine <alex.bou9@gmail.com> S: Maintained F: drivers/rapidio/ +RAS ERROR STATUS +M: Ahmed Tiba <ahmed.tiba@arm.com> +S: Maintained +F: Documentation/devicetree/bindings/firmware/arm,ras-cper.yaml + RAS INFRASTRUCTURE M: Tony Luck <tony.luck@intel.com> M: Borislav Petkov <bp@alien8.de>
--
2.43.0