[PATCH 2/6] arm64: dts: rockchip: Add AP6275P wireless support for Khadas Edge 2L
From: Gray Huang <hidden>
Date: 2026-03-25 05:49:02
Also in:
linux-devicetree, linux-rockchip, lkml
Subsystem:
the rest · Maintainer:
Linus Torvalds
The Khadas Edge 2L board uses the Ampak AP6275P (BCM43752) PCIe Wi-Fi 6 module. Enable the pcie0 controller and add the Wi-Fi module as its child node. Additionally, enable the HYM8563 RTC to provide the 32.768kHz LPO clock required by the Wi-Fi module, along with the necessary CombPHY and fixed regulator. Signed-off-by: Gray Huang <redacted> --- .../dts/rockchip/rk3576-khadas-edge-2l.dts | 71 ++++++++++++++++++- 1 file changed, 70 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts b/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts
index 5781deae00d9..09cb0f0d6dcf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts@@ -47,7 +47,19 @@ vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 { vin-supply = <&vcc_sys>; }; - + vcc_wifi_reg_on: regulator-wifi-reg-on { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&wifi_reg_on>; + pinctrl-names = "default"; + regulator-name = "wifi_reg_on"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_1v8_s3>; + }; }; &cpu_l0 {
@@ -431,6 +443,63 @@ regulator-state-mem { }; }; +&combphy0_ps { + status = "okay"; +}; + +&pcie0 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie0_rst>; + reset-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc_3v3_s3>; + status = "okay"; + + pcie@0,0 { + reg = <0x0 0 0 0 0>; + bus-range = <0x0 0xf>; + device_type = "pci"; + ranges; + #address-cells = <3>; + #size-cells = <2>; + + wifi: wifi@0,0 { + compatible = "pci14e4,449d"; + reg = <0x10000 0 0 0 0>; + clocks = <&hym8563>; + clock-names = "lpo"; + }; + }; +}; + +&i2c2 { + status = "okay"; + + hym8563: hym8563@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-output-names = "hym8563"; + wakeup-source; + }; +}; + +&pinctrl { + pcie0 { + pcie0_rst: pcie0-rst { + rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wifi { + wifi_reg_on: wifi-reg-on { + rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + wifi_wake_host: wifi-wake-host { + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +}; &sdhci { bus-width = <8>;
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2.34.1