Re: i.MX8MP: Fix HDMI LCDIF FIFO underruns
From: Krzysztof Hałasa <khalasa@piap.pl>
Date: 2026-03-23 12:54:47
Also in:
dri-devel, imx, lkml
Hi Liu, Liu Ying [off-list ref] writes:
If you may use a display mode with low resolution, say 640x480p60, and the issue still happens, then I bet it's not related to the panic threshold settings, but more likely related to KMS detail control seqeunce. This reminds me that Lucas had a patch series[1] to try to fix the sequence, but it seems that it didn't fix i.MX93 LCDIF according to [2] hence no landing.
It seems it depends on resolution: at 1080p60 with the DIV_ROUND_UP (thresholds increased by 1) it seems to work fine. At 2160p30 (twice the clock) there are frequent underruns. Now with thresholds increased to 2/4 and 3/4, weston started fine 10/10, while shutdowns were 8/10. 4/6 and 5/6 made it worse, though. I don't know now. I will try to investigate a bit more tomorrow. Perhaps the sequence of register writes could be better, indeed. The following doesn't fix it for me either:
--- a/drivers/gpu/drm/mxsfb/lcdif_kms.c
+++ b/drivers/gpu/drm/mxsfb/lcdif_kms.c@@ -358,34 +358,27 @@ static void lcdif_enable_controller(struct lcdif_drm_private *lcdif) writel(INT_ENABLE_D1_PLANE_PANIC_EN, lcdif->base + LCDC_V8_INT_ENABLE_D1); - reg = readl(lcdif->base + LCDC_V8_DISP_PARA); - reg |= DISP_PARA_DISP_ON; - writel(reg, lcdif->base + LCDC_V8_DISP_PARA); - reg = readl(lcdif->base + LCDC_V8_CTRLDESCL0_5); reg |= CTRLDESCL0_5_EN; writel(reg, lcdif->base + LCDC_V8_CTRLDESCL0_5); + + reg = readl(lcdif->base + LCDC_V8_DISP_PARA); + reg |= DISP_PARA_DISP_ON; + writel(reg, lcdif->base + LCDC_V8_DISP_PARA); }
--
Krzysztof "Chris" Hałasa
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