Thread (7 messages) 7 messages, 3 authors, 2026-03-20

Re: [PATCH v5 2/2] pinctrl: sunxi: fix gpiochip_lock_as_irq() failure when pinmux is unknown

From: Andre Przywara <andre.przywara@arm.com>
Date: 2026-03-20 13:49:15
Also in: linux-gpio, linux-sunxi, lkml

Hi Michal,

On 3/19/26 18:19, Michal Piekos wrote:
quoted hunk ↗ jump to hunk
Fixes kernel hang during boot due to inability to set up IRQ on AXP313a.

The issue is caused by gpiochip_lock_as_irq() which is failing when gpio
is in uninitialized state.

Solution is to set pinmux to GPIO INPUT in
sunxi_pinctrl_irq_request_resources() if it wasn't initialized
earlier.

Tested on Orange Pi Zero 3.

Fixes: 01e10d0272b9 ("pinctrl: sunxi: Implement gpiochip::get_direction()")
Signed-off-by: Michal Piekos <redacted>
---
  drivers/pinctrl/sunxi/pinctrl-sunxi.c | 21 +++++++++++++++++++--
  drivers/pinctrl/sunxi/pinctrl-sunxi.h |  2 ++
  2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 685b79fc0bf8..e3aa2b70aa7d 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -1092,15 +1092,32 @@ static int sunxi_pinctrl_irq_request_resources(struct irq_data *d)
  {
  	struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d);
  	struct sunxi_desc_function *func;
+	unsigned int offset;
+	u32 reg, shift, mask;
+	u8 muxval;
  	int ret;
+	u8 disabled_mux;
Iff you are going to respin, maybe use the inverted Christmas tree 
style, and group the u8 variables.
  
  	func = sunxi_pinctrl_desc_find_function_by_pin(pctl,
  					pctl->irq_array[d->hwirq], "irq");
  	if (!func)
  		return -EINVAL;
  
-	ret = gpiochip_lock_as_irq(pctl->chip,
-			pctl->irq_array[d->hwirq] - pctl->desc->pin_base);
+	offset = pctl->irq_array[d->hwirq] - pctl->desc->pin_base;
+	sunxi_mux_reg(pctl, offset, &reg, &shift, &mask);
+	muxval = (readl(pctl->membase + reg) & mask) >> shift;
+
+	/* Change muxing to GPIO INPUT mode if at reset value */
+	if (pctl->flags & SUNXI_PINCTRL_NEW_REG_LAYOUT)
+		disabled_mux = SUN4I_FUNC_DISABLED_NEW;
+	else
+		disabled_mux = SUN4I_FUNC_DISABLED_OLD;
+	
+	if (muxval == disabled_mux)
There is whitespace damage in three of the four lines above.
Maybe this can be fixed up while applying?

The patch still feels a bit arbitrary, and looking at the definition of 
SUN4I_FUNC_IRQ below we probably need another rework, but if that fixes 
the issues observed, we should take it now:

(with the w/s damage fixed:)
Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Cheers,
Andre
quoted hunk ↗ jump to hunk
+		sunxi_pmx_set(pctl->pctl_dev, pctl->irq_array[d->hwirq],
+			      SUN4I_FUNC_INPUT);
+
+	ret = gpiochip_lock_as_irq(pctl->chip, offset);
  	if (ret) {
  		dev_err(pctl->dev, "unable to lock HW IRQ %lu for IRQ\n",
  			irqd_to_hwirq(d));
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
index 22bffac1c3f0..0daf7600e2fb 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
@@ -86,6 +86,8 @@
  
  #define SUN4I_FUNC_INPUT	0
  #define SUN4I_FUNC_IRQ		6
+#define SUN4I_FUNC_DISABLED_OLD 7
+#define SUN4I_FUNC_DISABLED_NEW 15
  
  #define SUNXI_PINCTRL_VARIANT_MASK	GENMASK(7, 0)
  #define SUNXI_PINCTRL_NEW_REG_LAYOUT	BIT(8)
  
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