[PATCH v4 6/8] pinctrl: realtek: add support for slew rate, input voltage and high VIL
From: Yu-Chun Lin <eleanor.lin@realtek.com>
Date: 2026-03-17 11:56:57
Also in:
linux-devicetree, linux-gpio, lkml
Subsystem:
arm/realtek architecture, pin control subsystem, the rest · Maintainers:
James Tai, Yu-Chun Lin, Linus Walleij, Linus Torvalds
From: Tzuyi Chang <redacted> Add support for configuring slew rate, input voltage level and high VIL mode. This involves updating the pin configuration parsing logic to handle PIN_CONFIG_SLEW_RATE, PIN_CONFIG_INPUT_VOLTAGE_UV and the new custom property "realtek,high-vil-microvolt". Reviewed-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Tzuyi Chang <redacted> Co-developed-by: Yu-Chun Lin <eleanor.lin@realtek.com> Signed-off-by: Yu-Chun Lin <eleanor.lin@realtek.com> --- Changes in v4: - Add Reviewed-by tag from Linus. --- drivers/pinctrl/realtek/pinctrl-rtd.c | 66 ++++++++++++++++++++++++++- drivers/pinctrl/realtek/pinctrl-rtd.h | 3 ++ 2 files changed, 68 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/realtek/pinctrl-rtd.c b/drivers/pinctrl/realtek/pinctrl-rtd.c
index 16cee851393e..ec266c5b7fa1 100644
--- a/drivers/pinctrl/realtek/pinctrl-rtd.c
+++ b/drivers/pinctrl/realtek/pinctrl-rtd.c@@ -37,11 +37,13 @@ struct rtd_pinctrl { #define RTD_DRIVE_STRENGH_P (PIN_CONFIG_END + 1) #define RTD_DRIVE_STRENGH_N (PIN_CONFIG_END + 2) #define RTD_DUTY_CYCLE (PIN_CONFIG_END + 3) +#define RTD_HIGH_VIL (PIN_CONFIG_END + 4) static const struct pinconf_generic_params rtd_custom_bindings[] = { {"realtek,drive-strength-p", RTD_DRIVE_STRENGH_P, 0}, {"realtek,drive-strength-n", RTD_DRIVE_STRENGH_N, 0}, {"realtek,duty-cycle", RTD_DUTY_CYCLE, 0}, + {"realtek,high-vil-microvolt", RTD_HIGH_VIL, 0}, }; static int rtd_pinctrl_get_groups_count(struct pinctrl_dev *pcdev)
@@ -288,7 +290,8 @@ static int rtd_pconf_parse_conf(struct rtd_pinctrl *data, u16 strength; u32 val; u32 mask; - u32 pulsel_off, pulen_off, smt_off, curr_off, pow_off, reg_off, p_off, n_off; + u32 pulsel_off, pulen_off, smt_off, curr_off, pow_off, reg_off, p_off, n_off, + input_volt_off, sr_off, hvil_off; const char *name = data->info->pins[pinnr].name; int ret = 0;
@@ -409,6 +412,67 @@ static int rtd_pconf_parse_conf(struct rtd_pinctrl *data, val = set_val ? mask : 0; break; + case PIN_CONFIG_SLEW_RATE: + if (config_desc->slew_rate_offset == NA) { + dev_err(data->dev, "Slew rate setting unsupported for pin: %s\n", name); + return -ENOTSUPP; + } + + switch (arg) { + case 1: + set_val = 0; + break; + case 10: + set_val = 1; + break; + case 20: + set_val = 2; + break; + case 30: + set_val = 3; + break; + default: + return -EINVAL; + } + + sr_off = config_desc->base_bit + config_desc->slew_rate_offset; + reg_off = config_desc->reg_offset; + mask = 0x3 << sr_off; + val = arg << sr_off; + break; + + case PIN_CONFIG_INPUT_VOLTAGE_UV: + if (config_desc->input_volt_offset == NA) { + dev_err(data->dev, "Input voltage level setting unsupported for pin:%s\n", + name); + return -ENOTSUPP; + } + + if (arg == 3300000) + set_val = 1; + else if (arg == 1800000) + set_val = 0; + else + return -EINVAL; + + input_volt_off = config_desc->base_bit + config_desc->input_volt_offset; + reg_off = config_desc->reg_offset; + + mask = BIT(input_volt_off); + val = set_val ? BIT(input_volt_off) : 0; + break; + + case RTD_HIGH_VIL: + if (config_desc->hvil_offset == NA) { + dev_err(data->dev, "High vil setting unsupported for pin:%s\n", name); + return -ENOTSUPP; + } + hvil_off = config_desc->base_bit + config_desc->hvil_offset; + reg_off = config_desc->reg_offset; + mask = BIT(hvil_off); + val = 1; + break; + case RTD_DRIVE_STRENGH_P: sconfig_desc = rtd_pinctrl_find_sconfig(data, pinnr); if (!sconfig_desc) {
diff --git a/drivers/pinctrl/realtek/pinctrl-rtd.h b/drivers/pinctrl/realtek/pinctrl-rtd.h
index 7fb0955ce749..02e2d8d269b5 100644
--- a/drivers/pinctrl/realtek/pinctrl-rtd.h
+++ b/drivers/pinctrl/realtek/pinctrl-rtd.h@@ -34,6 +34,9 @@ struct rtd_pin_config_desc { unsigned int smt_offset; unsigned int power_offset; unsigned int curr_type; + unsigned int input_volt_offset; + unsigned int slew_rate_offset; + unsigned int hvil_offset; }; struct rtd_pin_sconfig_desc {
--
2.34.1