Thread (12 messages) 12 messages, 4 authors, 2026-04-07
STALE99d
Revisions (4)
  1. v1 [diff vs current]
  2. v2 current
  3. v3 [diff vs current]
  4. v4 [diff vs current]

[PATCH V2 2/5] dmaengine: xilinx_dma: Move descriptors to done list based on completion bit

From: Srinivas Neeli <srinivas.neeli@amd.com>
Date: 2026-03-13 06:25:54
Also in: dmaengine, linux-devicetree, lkml
Subsystem: dma generic offload engine subsystem, the rest · Maintainers: Vinod Koul, Linus Torvalds

In AXIMCDMA scatter-gather mode, the hardware sets the completion bit when
a transfer finishes. The driver now checks this bit to free descriptors
from the active list and move them to the done list.
This is required when interrupt delay timeout Dly_IrqEn is enabled,
as interrupts may be triggered before the configured threshold is reached,
even if not all descriptors have completed.

Signed-off-by: Srinivas Neeli <srinivas.neeli@amd.com>
---
 drivers/dma/xilinx/xilinx_dma.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 4a83492f2435..00200b4c2372 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -1762,6 +1762,18 @@ static void xilinx_dma_complete_descriptor(struct xilinx_dma_chan *chan)
 					      struct xilinx_axidma_tx_segment, node);
 			if (!(seg->hw.status & XILINX_DMA_BD_COMP_MASK) && chan->has_sg)
 				break;
+		} else if (chan->xdev->dma_config->dmatype == XDMA_TYPE_AXIMCDMA) {
+			struct xilinx_aximcdma_tx_segment *seg;
+			bool completed;
+
+			seg = list_last_entry(&desc->segments,
+					      struct xilinx_aximcdma_tx_segment,
+					      node);
+			completed = (chan->direction == DMA_DEV_TO_MEM) ?
+				(seg->hw.s2mm_status & XILINX_DMA_BD_COMP_MASK) :
+				(seg->hw.mm2s_status & XILINX_DMA_BD_COMP_MASK);
+			if (!completed)
+				break;
 		}
 		if (chan->has_sg && chan->xdev->dma_config->dmatype !=
 		    XDMA_TYPE_VDMA)
-- 
2.43.0

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