Thread (18 messages) 18 messages, 5 authors, 2026-03-11

Re: [PATCH 2/3] dt-bindings: clock: amlogic: t7: Add missing mpll3 parent clock

From: Krzysztof Kozlowski <krzk@kernel.org>
Date: 2026-03-10 07:08:35
Also in: linux-amlogic, linux-clk, linux-devicetree, lkml

On 10/03/2026 07:51, Jian Hu wrote:
On 3/6/2026 4:12 PM, Krzysztof Kozlowski wrote:
quoted
[ EXTERNAL EMAIL ]

On Thu, Mar 05, 2026 at 03:43:26PM +0800, Jian Hu wrote:
quoted
The mpll3 clock is a valid parent clock for sd_emmc and mipi_isp on
the Amlogic T7 SoC, but was missing from t7-peripherals-clkc.yaml.
Add it to enable proper clock parent configuration for these peripherals.

Signed-off-by: Jian Hu <redacted>
---
  .../bindings/clock/amlogic,t7-peripherals-clkc.yaml       | 8 ++++++--
  1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml
index 55bb73707d58..27cc1f331587 100644
--- a/Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml
+++ b/Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml
@@ -24,7 +24,7 @@ properties:
      const: 1

    clocks:
-    minItems: 14
+    minItems: 15
      items:
        - description: input oscillator
        - description: input sys clk
@@ -40,12 +40,13 @@ properties:
        - description: input gp1 pll
        - description: input mpll1
        - description: input mpll2
+      - description: input mpll3
Nah, ABI break. You add it to the end of the list or provide arguments
on ABI impact.
The third patch in this series enables the DT for the Amlogic T7 clock 
controller.

The clock controller node for amlogic,t7-peripherals-clkc has not been 
merged upstream yet.
This change modifies the clock index order, but it will not break any 
existing device tree since the
amlogic,t7-peripherals-clkc bindings are not used by any upstream or 
downstream DT at this time.

Therefore, it does NOT break the ABI.
It does. Clearly visible from the diff above, because the order is the ABI.
The last clock entry is an external pad input for RTC and it is optional.
For logical consistency, it is better to place the required mpll3 entry 
before the optional entry.

If this change does not break the ABI, could I keep it in its original 
logical order right after mpll2?
Change breaks the ABI and commit must explain why and the impact.


Best regards,
Krzysztof
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