RE: [PATCH 1/2] dt-bindings: fsl: fsl,imx7ulp-smc1: Add #clock-cells

Hi Conor,

Subject: Re: [PATCH 1/2] dt-bindings: fsl: fsl,imx7ulp-smc1: Add #clock-
cells

On Thu, Feb 26, 2026 at 07:04:15PM +0800, Peng Fan (OSS) wrote:

quoted

From: Peng Fan <peng.fan@nxp.com>

Add missing #clock-cells to make it work as a clock controller.

Yes, that is what adding #clock-cells would do, but why is it correct to
do? That's what your commit message needs to explain.

Without #clock-cells, there is CHECK_DTBS error, #clock-cells
was added in imx7ulp.dtsi, but missed in dt-bindings.

smc1 supports run mode control
00b - Normal Run mode (RUN)
01b - Reserved
10b - Very-Low-Power Run mode (VLPR)
11b - High Speed Run mode (HSRUN)

This is taken as cpu clock settings. When set this registers,
the cpu will be configured to run as specified frequencies as written
in patch 2(OPP table).

I will update commit msg in V2.

Thanks,
Peng.

quoted

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-

pm.yaml |

quoted

5 +++++
 1 file changed, 5 insertions(+)

diff --git
a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-

pm.yaml

quoted

b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-

pm.yaml

quoted

index

9d377e193c123c7de0ec4db4d4a649ed966b2d9a..7ad470260c0d08b
d1e7146ef49e5

quoted

f60dd6c6d4d7 100644
---
a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-

pm.yaml

quoted

+++

b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.y

quoted

+++ aml

@@ -28,6 +28,9 @@ properties:
   reg:
     maxItems: 1

+  '#clock-cells':
+    const: 1
+
   clocks:
     maxItems: 2

@@ -39,6 +42,7 @@ properties:
 required:
   - compatible
   - reg
+  - '#clock-cells'

 additionalProperties: false

@@ -47,4 +51,5 @@ examples:
     smc1@40410000 {
         compatible = "fsl,imx7ulp-smc1";
         reg = <0x40410000 0x1000>;
+        #clock-cells = <1>;
     };

--

2.37.1