[PATCH 01/13] clk: add new flag CLK_ROUNDING_FW_MANAGED
From: Brian Masney <bmasney@redhat.com>
Date: 2026-02-26 18:17:45
Also in:
arm-scmi, imx, linux-arm-msm, linux-clk, linux-renesas-soc, linux-samsung-soc, lkml
Subsystem:
common clk framework, the rest · Maintainers:
Michael Turquette, Stephen Boyd, Linus Torvalds
There are some clocks where the rounding is managed by the hardware, and the determine_rate() clk ops is just a noop that simply returns 0. Add a new flag for these type of clocks, and update the clk core so that the determine_rate() clk op is not required when this flag is set. Signed-off-by: Brian Masney <bmasney@redhat.com> --- To: Michael Turquette <mturquette@baylibre.com> To: Stephen Boyd <sboyd@kernel.org> To: Abel Vesa <abelvesa@kernel.org> To: Andrea della Porta <andrea.porta@suse.com> To: Baolin Wang <baolin.wang@linux.alibaba.com> To: Bjorn Andersson <andersson@kernel.org> To: Chanwoo Choi <cw00.choi@samsung.com> To: Frank Li <Frank.Li@nxp.com> To: Geert Uytterhoeven <geert+renesas@glider.be> To: Krzysztof Kozlowski <krzk@kernel.org> To: Orson Zhai <orsonzhai@gmail.com> To: Sascha Hauer <s.hauer@pengutronix.de> To: Sudeep Holla <sudeep.holla@kernel.org> To: Sylwester Nawrocki <s.nawrocki@samsung.com> To: Tudor Ambarus <tudor.ambarus@linaro.org> Cc: linux-clk@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Alim Akhtar <alim.akhtar@samsung.com> Cc: arm-scmi@vger.kernel.org Cc: Chunyan Zhang <zhang.lyra@gmail.com> Cc: Cristian Marussi <cristian.marussi@arm.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: imx@lists.linux.dev Cc: linux-arm-kernel@lists.infradead.org Cc: linux-arm-msm@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-samsung-soc@vger.kernel.org Cc: Peng Fan <peng.fan@nxp.com> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> --- drivers/clk/clk.c | 24 +++++++++++++++++++++--- include/linux/clk-provider.h | 2 ++ 2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index fd418dc988b1c60c49e3ac9c0c44aa132dd5da28..0a522a0817411c7f7c6e9cffd6f024e672a331a8 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c@@ -1557,6 +1557,20 @@ static int __init clk_disable_unused(void) } late_initcall_sync(clk_disable_unused); +/** + * clk_is_rounding_fw_managed - Check to see if clk rounding is handled by the + * firmware. + * @core: the clk to check + * + * Clks that have this flag enabled do not need to have a determine_rate() op + * set, and will always return success for any rounding operation since the + * firmware will deal with the rounding. + */ +static inline bool clk_is_rounding_fw_managed(struct clk_core *core) +{ + return core->flags & CLK_ROUNDING_FW_MANAGED; +} + static int clk_core_determine_round_nolock(struct clk_core *core, struct clk_rate_request *req) {
@@ -1589,6 +1603,8 @@ static int clk_core_determine_round_nolock(struct clk_core *core, req->rate = core->rate; } else if (core->ops->determine_rate) { return core->ops->determine_rate(core->hw, req); + } else if (clk_is_rounding_fw_managed(core)) { + return 0; } else { return -EINVAL; }
@@ -1673,7 +1689,7 @@ EXPORT_SYMBOL_GPL(clk_hw_forward_rate_request); static bool clk_core_can_round(struct clk_core * const core) { - return core->ops->determine_rate; + return core->ops->determine_rate || clk_is_rounding_fw_managed(core); } static int clk_core_round_rate_nolock(struct clk_core *core,
@@ -3528,6 +3544,7 @@ static const struct { ENTRY(CLK_IS_CRITICAL), ENTRY(CLK_OPS_PARENT_ENABLE), ENTRY(CLK_DUTY_CYCLE_PARENT), + ENTRY(CLK_ROUNDING_FW_MANAGED), #undef ENTRY };
@@ -3906,7 +3923,7 @@ static int __clk_core_init(struct clk_core *core) /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */ if (core->ops->set_rate && !core->ops->determine_rate && - core->ops->recalc_rate) { + core->ops->recalc_rate && !clk_is_rounding_fw_managed(core)) { pr_err("%s: %s must implement .determine_rate in addition to .recalc_rate\n", __func__, core->name); ret = -EINVAL;
@@ -3920,7 +3937,8 @@ static int __clk_core_init(struct clk_core *core) goto out; } - if (core->ops->set_parent && !core->ops->determine_rate) { + if (core->ops->set_parent && !core->ops->determine_rate && + !clk_is_rounding_fw_managed(core)) { pr_err("%s: %s must implement .set_parent & .determine_rate\n", __func__, core->name); ret = -EINVAL;
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 1cda2c78dffaff037f0f16b0f11106b63b3a746f..187f8248a9c840c701cbbba99bb7cdeef7b654ee 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h@@ -32,6 +32,8 @@ #define CLK_OPS_PARENT_ENABLE BIT(12) /* duty cycle call may be forwarded to the parent clock */ #define CLK_DUTY_CYCLE_PARENT BIT(13) +/* clock rate rounding is managed by firmware, don't require determine_rate */ +#define CLK_ROUNDING_FW_MANAGED BIT(14) struct clk; struct clk_hw;
--
2.53.0