Thread (45 messages) 45 messages, 8 authors, 2026-03-18

Re: [PATCH 00/11] Plane Color Pipeline support for MediaTek

From: CK Hu (胡俊光) <hidden>
Date: 2026-02-26 06:24:35
Also in: dri-devel, linux-mediatek, lkml

On Fri, 2026-02-06 at 08:28 -0500, Nícolas F. R. A. Prado wrote:
On Fri, 2026-02-06 at 11:09 +0200, Pekka Paalanen wrote:
quoted
On Fri, 2 Jan 2026 13:40:21 -0500
Harry Wentland [off-list ref] wrote:
quoted
On 2026-01-01 07:37, Shengyu Qu wrote:
quoted

在 2025/12/30 02:53, Shengyu Qu 写道:  
quoted

在 2025/12/24 3:44, NÃ colas F. R. A. Prado 写道:  
quoted
quoted
quoted
quoted
Given the lack of support for writeback connectors on the
MediaTek KMS driver, combined with limited hardware
documentation, I haven't been able to verify the correctness
of
each curve, only that they were visually sane (gamma curves
made
the image on the display brighter, while inverse gamma made
it
darker).  
Hmmm I don't think this is acceptable. sRGB/scRGB has two
transfer
functions mentioned in original specification[1]. To keep color
accuracy, we need someone from mediatek confirm whether this is
piece- wise or pure power 2.2 transfer function, this is
already
done in original amdgpu color pipeline series, sRGB means
piece-wise while also dedicated power 2.2 function exists.  
Not sure what you mean with this not being acceptable. This is
about
enabling HW support for this functionality. Not every HW has
writeback for testing. At some point you'll have to trust the
driver
devs if you're going to use functionality of the driver. We're not
always going to get everything perfect, but if that's really such a
worry you can always use shaders to do precisely what you want.
Hi Harry,

yes, but I understood that in this case, the hardware documentation
available is so vague that it's impossible to say what it will
actually
do. There are no formulas given or referenced in the documentation,
are
there, Nícolas?
No formulas at all, the only documentation I had available for the
curves was the register definition, which simply lists the possible
values: SCRGB, BT709, BT2020, HLG.
Hi, Nicolas:

In [1], it shows OVL could output data to WDMA which could write data into DRAM.
Its control is similar to RDMA. RDMA read data from DRAM and WDMA write data into DRAM.
Do you have interest to implement WDMA?
This is just a suggestion.
I could accept we believe what document say first and wait for someone to verify it.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/soc/mediatek/mt8195-mmsys.h?h=v7.0-rc1#n8

Regards,
CK
  
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help