Re: [PATCH 5/6] KVM: arm64: Kill KVM_PGTABLE_S2_NOFWB

---
 arch/arm64/include/asm/kvm_pgtable.h |  7 ++-----
 arch/arm64/kvm/hyp/pgtable.c         | 17 +++++++----------
 2 files changed, 9 insertions(+), 15 deletions(-)

diff --git a/arch/arm64/include/asm/kvm_pgtable.h b/arch/arm64/include/asm/kvm_pgtable.h
index 9ce51a637da0a..2198b62428832 100644
--- a/arch/arm64/include/asm/kvm_pgtable.h
+++ b/arch/arm64/include/asm/kvm_pgtable.h

@@ -229,15 +229,12 @@ struct kvm_pgtable_mm_ops {

 /**
  * enum kvm_pgtable_stage2_flags - Stage-2 page-table flags.
- * @KVM_PGTABLE_S2_NOFWB:      Don't enforce Normal-WB even if the CPUs have
- *                             ARM64_HAS_STAGE2_FWB.
  * @KVM_PGTABLE_S2_IDMAP:      Only use identity mappings.
  * @KVM_PGTABLE_S2_AS_S1:      Final memory attributes are that of Stage-1.
  */
 enum kvm_pgtable_stage2_flags {
-       KVM_PGTABLE_S2_NOFWB                    = BIT(0),
-       KVM_PGTABLE_S2_IDMAP                    = BIT(1),
-       KVM_PGTABLE_S2_AS_S1                    = BIT(2),
+       KVM_PGTABLE_S2_IDMAP                    = BIT(0),
+       KVM_PGTABLE_S2_AS_S1                    = BIT(1),
 };

 /**

diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
index 07561a227f75e..3c2f7967fdc03 100644
--- a/arch/arm64/kvm/hyp/pgtable.c
+++ b/arch/arm64/kvm/hyp/pgtable.c

@@ -631,12 +631,9 @@ u64 kvm_get_vtcr(u64 mmfr0, u64 mmfr1, u32 phys_shift)
        return vtcr;
 }

-static bool stage2_has_fwb(struct kvm_pgtable *pgt)
+static bool stage2_has_fwb(void)
 {
-       if (!cpus_have_final_cap(ARM64_HAS_STAGE2_FWB))
-               return false;
-
-       return !(pgt->flags & KVM_PGTABLE_S2_NOFWB);
+       return cpus_have_final_cap(ARM64_HAS_STAGE2_FWB);
 }

 void kvm_tlb_flush_vmid_range(struct kvm_s2_mmu *mmu,

@@ -664,10 +661,10 @@ void kvm_tlb_flush_vmid_range(struct kvm_s2_mmu *mmu,
                kvm_pte_t __attr;                                       \
                if((pgt)->flags & KVM_PGTABLE_S2_AS_S1)                 \
                        __attr = PAGE_S2_MEMATTR(AS_S1,                 \
-                                                stage2_has_fwb(pgt));  \
+                                                stage2_has_fwb());     \
                else                                                    \
                        __attr = PAGE_S2_MEMATTR(attr,                  \
-                                                stage2_has_fwb(pgt));  \
+                                                stage2_has_fwb());     \
                                                                        \
                __attr;                                                 \
        })

@@ -879,7 +876,7 @@ static bool stage2_unmap_defer_tlb_flush(struct kvm_pgtable *pgt)
         * system supporting FWB as the optimization is entirely
         * pointless when the unmap walker needs to perform CMOs.
         */
-       return system_supports_tlb_range() && stage2_has_fwb(pgt);
+       return system_supports_tlb_range() && stage2_has_fwb();
 }

 static void stage2_unmap_put_pte(const struct kvm_pgtable_visit_ctx *ctx,

@@ -1167,7 +1164,7 @@ static int stage2_unmap_walker(const struct kvm_pgtable_visit_ctx *ctx,
                if (mm_ops->page_count(childp) != 1)
                        return 0;
        } else if (stage2_pte_cacheable(pgt, ctx->old)) {
-               need_flush = !stage2_has_fwb(pgt);
+               need_flush = !stage2_has_fwb();
        }

        /*

@@ -1397,7 +1394,7 @@ int kvm_pgtable_stage2_flush(struct kvm_pgtable *pgt, u64 addr, u64 size)
                .arg    = pgt,
        };

-       if (stage2_has_fwb(pgt))
+       if (stage2_has_fwb())
                return 0;

        return kvm_pgtable_walk(pgt, addr, size, &walker);
--

2.47.3