Re: [PATCH v2 23/36] KVM: arm64: gic-v5: Support GICv5 interrupts with KVM_IRQ_LINE

On Wed, 2026-01-07 at 15:29 +0000, Jonathan Cameron wrote:

On Fri, 19 Dec 2025 15:52:43 +0000
Sascha Bischoff [off-list ref] wrote:

quoted

Interrupts under GICv5 look quite different to those from older Arm
GICs. Specifically, the type is encoded in the top bits of the
interrupt ID.

Extend KVM_IRQ_LINE to cope with GICv5 PPIs and SPIs. The requires
subtly changing the KVM_IRQ_LINE API for GICv5 guests. For older
Arm
GICs, PPIs had to be in the range of 16-31, and SPIs had to be
32-1019, but this no longer holds true for GICv5. Instead, for a
GICv5
guest support PPIs in the range of 0-127, and SPIs in the range
0-65535. The documentation is updated accordingly.

The SPI range doesn't cover the full SPI range that a GICv5 system
can
potentially cope with (GICv5 provides up to 24-bits of SPI ID
space,
and we only have 16 bits to work with in KVM_IRQ_LINE). However,
65k
SPIs is more than would be reasonably expected on systems for years
to
come.

Note: As the GICv5 KVM implementation currently doesn't support
injecting SPIs attempts to do so will fail. This restruction will

restriction

In general,  worth spell checking the lot. (something I always
forget to do for my own series!)

quoted

lifted as the GICv5 KVM support evolves.

Co-authored-by: Timothy Hayes [off-list ref]
Signed-off-by: Timothy Hayes <redacted>
Signed-off-by: Sascha Bischoff <redacted>

One passing comment inline. Perhaps there isn't a suitable place to
put
vgic_is_v5() though. I haven't checked.

Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>

quoted

---
 Documentation/virt/kvm/api.rst |  6 ++++--
 arch/arm64/kvm/arm.c           | 21 ++++++++++++++++++---
 arch/arm64/kvm/vgic/vgic.c     |  4 ++++
 3 files changed, 26 insertions(+), 5 deletions(-)

quoted

diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
index 94f8d13ab3b58..4448e8a5fc076 100644
--- a/arch/arm64/kvm/arm.c
+++ b/arch/arm64/kvm/arm.c

@@ -45,6 +45,8 @@

 #include <kvm/arm_pmu.h>
 #include <kvm/arm_psci.h>
 
+#include <linux/irqchip/arm-gic-v5.h>
+
 #include "sys_regs.h"
 
 static enum kvm_mode kvm_mode = KVM_MODE_DEFAULT;

@@ -1430,16 +1432,29 @@ int kvm_vm_ioctl_irq_line(struct kvm *kvm,

struct kvm_irq_level *irq_level,
 		if (!vcpu)
 			return -EINVAL;
 
-		if (irq_num < VGIC_NR_SGIS || irq_num >=
VGIC_NR_PRIVATE_IRQS)
+		if (kvm->arch.vgic.vgic_model ==
KVM_DEV_TYPE_ARM_VGIC_V5) {

Maybe it's worth moving the vgic_is_v5() helper to somewhere that
makes it useable
here?

Considering that this is handling code for interrupts on Arm, I've
added the kvm/arm_vgic.h header, and changed to using that helper.

Sascha

quoted

+			if (irq_num >= VGIC_V5_NR_PRIVATE_IRQS)
+				return -EINVAL;
+
+			/* Build a GICv5-style IntID here */
+			irq_num |= FIELD_PREP(GICV5_HWIRQ_TYPE,
GICV5_HWIRQ_TYPE_PPI);
+		} else if (irq_num < VGIC_NR_SGIS ||
+			   irq_num >= VGIC_NR_PRIVATE_IRQS) {
 			return -EINVAL;
+		}
 
 		return kvm_vgic_inject_irq(kvm, vcpu, irq_num,
level, NULL);