[PATCH v6 24/24] scsi: ufs: mediatek: Add MT8196 compatible, update copyright
From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Date: 2026-01-24 12:04:31
Also in:
linux-devicetree, linux-mediatek, linux-phy, linux-scsi, lkml
Subsystem:
scsi subsystem, the rest, universal flash storage host controller driver mediatek hooks · Maintainers:
"James E.J. Bottomley", "Martin K. Petersen", Linus Torvalds, Peter Wang, Chaotian Jing
THe MT8196's UFS controller has a new compatible. Add the necessary struct definitions to support it. Also update the copyrights and authors, without tabs following spaces to avoid checkpatch errors, to list myself as having contributed to this driver after the preceding rework patches. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> --- drivers/ufs/host/ufs-mediatek.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index dfa104207cc6..122bc741294d 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c@@ -1,9 +1,11 @@ // SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2019 MediaTek Inc. + * Copyright (C) 2025 Collabora Ltd. * Authors: - * Stanley Chu <stanley.chu@mediatek.com> - * Peter Wang <peter.wang@mediatek.com> + * Stanley Chu <stanley.chu@mediatek.com> + * Peter Wang <peter.wang@mediatek.com> + * Nicolas Frattaroli <nicolas.frattaroli@collabora.com> (Major cleanups) */ #include <linux/arm-smccc.h>
@@ -2200,6 +2202,10 @@ static const char *const ufs_mtk_regs_avdd12_ckbuf_avdd18[] = { "avdd12", "avdd12-ckbuf", "avdd18" }; +static const char *const ufs_mtk_regs_avdd12_ckbuf[] = { + "avdd12", "avdd12-ckbuf" +}; + static const struct ufs_mtk_soc_data mt8183_data = { .has_avdd09 = true, .reg_names = ufs_mtk_regs_avdd12_avdd18,
@@ -2212,10 +2218,17 @@ static const struct ufs_mtk_soc_data mt8192_8195_data = { .num_reg_names = ARRAY_SIZE(ufs_mtk_regs_avdd12_ckbuf_avdd18), }; +static const struct ufs_mtk_soc_data mt8196_data = { + .has_avdd09 = true, + .reg_names = ufs_mtk_regs_avdd12_ckbuf, + .num_reg_names = ARRAY_SIZE(ufs_mtk_regs_avdd12_ckbuf), +}; + static const struct of_device_id ufs_mtk_of_match[] = { { .compatible = "mediatek,mt8183-ufshci", .data = &mt8183_data }, { .compatible = "mediatek,mt8192-ufshci", .data = &mt8192_8195_data }, { .compatible = "mediatek,mt8195-ufshci", .data = &mt8192_8195_data }, + { .compatible = "mediatek,mt8196-ufshci", .data = &mt8196_data }, {}, }; MODULE_DEVICE_TABLE(of, ufs_mtk_of_match);
--
2.52.0