Re: [PATCH v6 00/11] Add HDMI 2.1 FRL support to phy-rockchip-samsung-hdptx
From: Vinod Koul <vkoul@kernel.org>
Date: 2026-01-21 08:52:30
Also in:
linux-phy, linux-rockchip, lkml
On Tue, 13 Jan 2026 01:20:47 +0200, Cristian Ciocaltea wrote:
The Samsung HDMI/eDP Transmitter Combo PHY is capable of handling four HDMI 2.1 Fixed Rate Link (FRL) lanes, while each lane can operate at 3Gbps, 6Gbps, 8Gbps, 10Gbps or 12Gbps. This patchset extends the HDMI PHY configuration API to manage the FRL mode and provides all the required HDMI driver changes to enable FRL in addition to the already supported TMDS mode. [...]
Applied, thanks!
[01/11] phy: hdmi: Add HDMI 2.1 FRL configuration options
commit: 41c6cac6decd5123db1da8ca240a9c808b0ae6ce
[02/11] phy: rockchip: samsung-hdptx: Use usleep_range() instead of udelay()
commit: 0ef8dd1034e3656e40d020911bb7aa14e7084663
[03/11] phy: rockchip: samsung-hdptx: Fix coding style alignment
commit: 4f310f180373bd0e68311debee7a0dddb14c1656
[04/11] phy: rockchip: samsung-hdptx: Consistently use [rk_]hdptx_[tmds_] prefixes
commit: 925f26a4f8c65e5686e1820f0bdc7e0a237edba7
[05/11] phy: rockchip: samsung-hdptx: Enable lane output in common helper
commit: 8e8aa072b19d0d16afbfd690c8e50628176db3ef
[06/11] phy: rockchip: samsung-hdptx: Cleanup *_cmn_init_seq lists
commit: df74a964e4354e65fefef60c9c50765ff32cd26e
[07/11] phy: rockchip: samsung-hdptx: Compute clk rate from PLL config
commit: 3481fc04d969bc1528c2d1f7c02443a9fccf1a83
[08/11] phy: rockchip: samsung-hdptx: Drop hw_rate driver data
commit: 66d76b6d958d7ca195c8b3f43828b12a206fb731
[09/11] phy: rockchip: samsung-hdptx: Switch to driver specific HDMI config
commit: ac079c1207e492924237fdfb12c93664265b2e23
[10/11] phy: rockchip: samsung-hdptx: Extend rk_hdptx_phy_verify_hdmi_config() helper
commit: b14fec4dbda301d61603c047277b4f447837b3e3
[11/11] phy: rockchip: samsung-hdptx: Add HDMI 2.1 FRL support
commit: de5dba83311842cf208735b37bea84073688d470
Best regards,
--
~Vinod