Thread (6 messages) 6 messages, 4 authors, 2026-01-21

Re: [PATCH v2] arm64: dts: rockchip: Explicitly request UFS reset pin on RK3576

From: Heiko Stübner <heiko@sntech.de>
Date: 2026-01-20 14:41:20
Also in: linux-devicetree, linux-rockchip, lkml, stable

Am Dienstag, 20. Januar 2026, 14:14:48 Mitteleuropäische Normalzeit schrieb Alexey Charkov:
On Tue, Jan 20, 2026 at 5:00 PM Quentin Schulz [off-list ref] wrote:
quoted
Hi Alexey,

On 1/20/26 1:53 PM, Alexey Charkov wrote:
quoted
Rockchip RK3576 UFS controller uses a dedicated pin to reset the connected
UFS device, which can operate either in a hardware controlled mode or as a
GPIO pin.

Power-on default is GPIO mode, but the boot ROM reconfigures it to a
hardware controlled mode if it uses UFS to load the next boot stage.

Given that existing bindings (and rk3576.dtsi) expect a GPIO-controlled
device reset, request the required pin config explicitly.

This doesn't appear to affect Linux, but it does affect U-boot:

Before:
=> md.l 0x2604b398
2604b398: 00000011 00000000 00000000 00000000  ................
< ... snip ... >
=> ufs init
ufshcd-rockchip ufshc@2a2d0000: [RX, TX]: gear=[3, 3], lane[2, 2], pwr[FASTAUTO_MODE, FASTAUTO_MODE], rate = 2
=> md.l 0x2604b398
2604b398: 00000011 00000000 00000000 00000000  ................

After:
=> md.l 0x2604b398
2604b398: 00000011 00000000 00000000 00000000  ................
< ... snip ...>
=> ufs init
ufshcd-rockchip ufshc@2a2d0000: [RX, TX]: gear=[3, 3], lane[2, 2], pwr[FASTAUTO_MODE, FASTAUTO_MODE], rate = 2
=> md.l 0x2604b398
2604b398: 00000010 00000000 00000000 00000000  ................

(0x2604b398 is the respective pin mux register, with its BIT0 driving the
mode of UFS_RST: unset = GPIO, set = hardware controlled UFS_RST)

This helps ensure that GPIO-driven device reset actually fires when the
system requests it, not when whatever black box magic inside the UFSHC
decides to reset the flash chip.
Would have liked a mention on why pull-down in the commit log.
Indeed. Heiko, if you're going to apply this to your tree, would you
mind amending the commit description with something like the
following?

The pin is requested with pull-down enabled, which is in line with the
SoC power-on default and helps ensure that the attached UFS chip stays
in reset until the driver takes over the control of the respective
GPIO line.
Will do :-)

Heiko

quoted
In any case,

Reviewed-by: Quentin Schulz <redacted>
Thanks a lot!

Best regards,
Alexey



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