Am Freitag, 9. Januar 2026, 09:00:45 Mitteleuropäische Normalzeit schrieb Andy Yan:

From: Andy Yan <andy.yan@rock-chips.com>

The DW DisplayPort hardware block can be configured to work in single,
dual,quad pixel mode on differnt platforms, so make the pixel mode set
by plat_data to support the upcoming rk3576 variant.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

While Dmitry helped a lot with looking at bridge drivers recently,
I think your recipient list does miss a number of other people
listed as bridge reviewers/maintainers.

$ scripts/get_maintainer.pl drivers/gpu/drm/bridge
Andrzej Hajda [off-list ref] (maintainer:DRM DRIVERS FOR BRIDGE CHIPS)
Neil Armstrong [off-list ref] (maintainer:DRM DRIVERS FOR BRIDGE CHIPS)
Robert Foss [off-list ref] (maintainer:DRM DRIVERS FOR BRIDGE CHIPS)
Laurent Pinchart [off-list ref] (reviewer:DRM DRIVERS FOR BRIDGE CHIPS)
Jonas Karlman [off-list ref] (reviewer:DRM DRIVERS FOR BRIDGE CHIPS)
Jernej Skrabec [off-list ref] (reviewer:DRM DRIVERS FOR BRIDGE CHIPS)

As you'll need to do a v2 for the binding, please add the missing people
to the recipients.


For the change itself, can you improve the commit message a bit.

I assume the Single/Dual/Quad-Pixel config is a real hardware-feature
that is set when the IP is integrated into the soc? Or this a runtime
setting and a soc can support multiple output variants?


Thanks
Heiko