Hi Krzysztof,

On Mon, Jan 12, 2026 at 10:31 AM Krzysztof Kozlowski [off-list ref] wrote:

On Sat, Jan 10, 2026 at 09:04:24PM +0100, Martin Blumenstingl wrote:

quoted

Add a compatible string for the Mali-G31 GPU in the Amlogic Meson S4
SoC. It has two clock inputs (GPU clock and a bus clock) as well as two
resets (main GPU reset line and a GPU ABP reset line).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 .../bindings/gpu/arm,mali-bifrost.yaml        | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
index db49b8ff8c74..85fae7753004 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml

@@ -19,6 +19,7 @@ properties:
           - enum:
               - allwinner,sun50i-h616-mali
               - amlogic,meson-g12a-mali
+              - amlogic,meson-s4-mali
               - mediatek,mt8183-mali
               - mediatek,mt8183b-mali
               - mediatek,mt8186-mali

@@ -143,6 +144,25 @@ allOf:
         power-domain-names: false
       required:
         - resets
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: amlogic,meson-s4-mali
+    then:
+      properties:
+        power-domains:
+          maxItems: 1
+        power-domain-names: false
+        clocks:
+          minItems: 2

missing maxItems

Thanks, I'll add it!

Can't this be combined with existing meson entry, *after* fixing it to
include missing clocks?

I don't think so: G12A (and earlier SoCs) have the Mali registers
"somewhere", while on S4 Mali is on the APB4 bus.
Even if they are on a bus on G12A: then there's no clock linked with
that bus (at least nothing I'm aware of).
This is why I even introduced a new section in the bindings.


Best regards,
Martin