[PATCH v2 09/10] arm64: dts: imx952-evk: Add flexcan support
From: Peng Fan (OSS) <hidden>
Date: 2026-01-11 12:41:18
Also in:
imx, linux-devicetree, lkml
Subsystem:
arm/freescale imx / mxc arm architecture, the rest · Maintainers:
Frank Li, Sascha Hauer, Linus Torvalds
From: Haibo Chen <haibo.chen@nxp.com> Add flexcan support, since flexcan1 share pins with PDM, default disable flexcan1. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> --- arch/arm64/boot/dts/freescale/imx952-evk.dts | 45 ++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx952-evk.dts b/arch/arm64/boot/dts/freescale/imx952-evk.dts
index 21b951a2156414819dfb589e5e7e736e7b1fe48a..bae7b88f8229babc42952b7abbeb912cbefc10fd 100644
--- a/arch/arm64/boot/dts/freescale/imx952-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx952-evk.dts@@ -64,6 +64,22 @@ linux_cma: linux,cma { }; }; + flexcan1_phy: can-phy0 { + compatible = "nxp,tjr1443"; + #phy-cells = <0>; + max-bitrate = <8000000>; + enable-gpios = <&pcal6416 6 GPIO_ACTIVE_HIGH>; + standby-gpios = <&pcal6416 5 GPIO_ACTIVE_LOW>; + }; + + flexcan2_phy: can-phy1 { + compatible = "nxp,tjr1443"; + #phy-cells = <0>; + max-bitrate = <8000000>; + enable-gpios = <&i2c4_pcal6408 4 GPIO_ACTIVE_HIGH>; + standby-gpios = <&i2c4_pcal6408 3 GPIO_ACTIVE_LOW>; + }; + reg_3p3v: regulator-3p3v { compatible = "regulator-fixed"; regulator-max-microvolt = <3300000>;
@@ -108,6 +124,21 @@ reg_usb_vbus: regulator-vbus { }; +/* pin conflict with PDM */ +&flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + phys = <&flexcan1_phy>; + status = "disabled"; +}; + +&flexcan2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + phys = <&flexcan2_phy>; + status = "okay"; +}; + &lpi2c2 { clock-frequency = <400000>; pinctrl-names = "default";
@@ -340,6 +371,20 @@ &wdog3 { }; &scmi_iomuxc { + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + IMX952_PAD_PDM_CLK__AONMIX_TOP_CAN1_TX 0x39e + IMX952_PAD_PDM_BIT_STREAM0__AONMIX_TOP_CAN1_RX 0x39e + >; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = < + IMX952_PAD_GPIO_IO25__WAKEUPMIX_TOP_CAN2_TX 0x39e + IMX952_PAD_GPIO_IO27__WAKEUPMIX_TOP_CAN2_RX 0x39e + >; + }; + pinctrl_lpi2c2: lpi2c2grp { fsl,pins = < IMX952_PAD_I2C2_SCL__AONMIX_TOP_LPI2C2_SCL 0x40000b9e
--
2.37.1