On Monday, 5 January 2026 09:12:00 Central European Standard Time Chaoyi Chen wrote:

Hello Nicolas,

On 1/5/2026 3:55 PM, Nicolas Frattaroli wrote:

quoted

On Tuesday, 30 December 2025 10:02:46 Central European Standard Time Chaoyi Chen wrote:

quoted

From: Chaoyi Chen <redacted>

According to RK3576 TRM part1 page13, the size of the GPU registers
is 128 KB.

Fixes: 57b1ce903966 ("arm64: dts: rockchip: Add rk3576 SoC base DT")
Signed-off-by: Chaoyi Chen <redacted>
---
 arch/arm64/boot/dts/rockchip/rk3576.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
index 6284e7bdc442..b375015f0662 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi

@@ -1271,7 +1271,7 @@ power-domain@RK3576_PD_VO1 {
 
 		gpu: gpu@27800000 {
 			compatible = "rockchip,rk3576-mali", "arm,mali-bifrost";
-			reg = <0x0 0x27800000 0x0 0x200000>;
+			reg = <0x0 0x27800000 0x0 0x20000>;
 			assigned-clocks = <&scmi_clk SCMI_CLK_GPU>;
 			assigned-clock-rates = <198000000>;
 			clocks = <&cru CLK_GPU>;

This is only true if you only consider the GPU_CONTROL and
JOB_CONTROL register ranges, and leave out the MMU_STAGE1
and MMU_STAGE2 ranges. I don't know if those need to be
mapped, since the MMU control registers are < 0x2000.

What do other bifrost devices do?

I don't quite understand your point. And this size is 0x20000,
not 0x2000. Before the change it was 0x200000, which overlaps the
address space of some hardware that comes after it like JPEG. 

Could you explain it again? Thank you.

Oops, I misread. You are correct, there's one too many zeroes,
and I thought you removed one too many. :)

Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

quoted

Kind regards,
Nicolas Frattaroli