[PATCH RFC 5/6] drm/mediatek: ovl: Disable AFBC on MT8188
From: Nícolas F. R. A. Prado <hidden>
Date: 2025-12-30 14:04:01
Also in:
dri-devel, linux-mediatek, lkml
Subsystem:
drm drivers, drm drivers for mediatek, the rest · Maintainers:
David Airlie, Simona Vetter, Chun-Kuang Hu, Philipp Zabel, Linus Torvalds
Despite MT8188's OVL being mostly the same IP as the OVL on MT8195, it does not support AFBC, even when the same register configurations are applied. Introduce a separate compatible for it with AFBC support disabled. Signed-off-by: Nícolas F. R. A. Prado <redacted> --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index 196b874057ba..97f6694772d4 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c@@ -762,6 +762,21 @@ static const struct mtk_disp_ovl_data mt8192_ovl_2l_driver_data = { .num_formats = ARRAY_SIZE(mt8173_formats), }; +static const struct mtk_disp_ovl_data mt8188_ovl_driver_data = { + .addr = DISP_REG_OVL_ADDR_MT8173, + .gmc_bits = 10, + .layer_nr = 4, + .fmt_rgb565_is_0 = true, + .smi_id_en = true, + .supports_afbc = false, + .blend_modes = BIT(DRM_MODE_BLEND_PREMULTI) | + BIT(DRM_MODE_BLEND_COVERAGE) | + BIT(DRM_MODE_BLEND_PIXEL_NONE), + .formats = mt8195_formats, + .num_formats = ARRAY_SIZE(mt8195_formats), + .supports_clrfmt_ext = true, +}; + static const struct mtk_disp_ovl_data mt8195_ovl_driver_data = { .addr = DISP_REG_OVL_ADDR_MT8173, .gmc_bits = 10,
@@ -790,6 +805,8 @@ static const struct of_device_id mtk_disp_ovl_driver_dt_match[] = { .data = &mt8192_ovl_driver_data}, { .compatible = "mediatek,mt8192-disp-ovl-2l", .data = &mt8192_ovl_2l_driver_data}, + { .compatible = "mediatek,mt8188-disp-ovl", + .data = &mt8188_ovl_driver_data}, { .compatible = "mediatek,mt8195-disp-ovl", .data = &mt8195_ovl_driver_data}, {},
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2.51.0