[PATCH v10 11/12] crypto: qce - Add support for BAM locking
From: Bartosz Golaszewski <hidden>
Date: 2025-12-19 10:08:45
Also in:
dmaengine, linux-arm-msm, linux-crypto, linux-doc, lkml
Subsystem:
crypto api, qualcomm crypto drivers, the rest · Maintainers:
Herbert Xu, "David S. Miller", Bartosz Golaszewski, Linus Torvalds
From: Bartosz Golaszewski <redacted> Implement the infrastructure for using the new DMA controller lock/unlock feature of the BAM driver. No functional change for now. Signed-off-by: Bartosz Golaszewski <redacted> Signed-off-by: Bartosz Golaszewski <redacted> --- drivers/crypto/qce/common.c | 18 ++++++++++++++++++ drivers/crypto/qce/dma.c | 39 ++++++++++++++++++++++++++++++++++----- drivers/crypto/qce/dma.h | 4 ++++ 3 files changed, 56 insertions(+), 5 deletions(-)
diff --git a/drivers/crypto/qce/common.c b/drivers/crypto/qce/common.c
index 04253a8d33409a2a51db527435d09ae85a7880af..292fb3c7bbd3d6f096bbdc3c66d37d11e9ea109a 100644
--- a/drivers/crypto/qce/common.c
+++ b/drivers/crypto/qce/common.c@@ -593,3 +593,21 @@ void qce_get_version(struct qce_device *qce, u32 *major, u32 *minor, u32 *step) *minor = (val & CORE_MINOR_REV_MASK) >> CORE_MINOR_REV_SHIFT; *step = (val & CORE_STEP_REV_MASK) >> CORE_STEP_REV_SHIFT; } + +int qce_bam_lock(struct qce_device *qce) +{ + qce_clear_bam_transaction(qce); + /* Dummy write to acquire the lock on the BAM pipe. */ + qce_write(qce, REG_VERSION, 0); + + return qce_submit_cmd_desc_lock(qce); +} + +int qce_bam_unlock(struct qce_device *qce) +{ + qce_clear_bam_transaction(qce); + /* Dummy write to release the lock on the BAM pipe. */ + qce_write(qce, REG_VERSION, 0); + + return qce_submit_cmd_desc_unlock(qce); +}
diff --git a/drivers/crypto/qce/dma.c b/drivers/crypto/qce/dma.c
index ba7a52fd4c6349d59c075c346f75741defeb6034..885053955ac3dc95efefef541907f57844b60a3d 100644
--- a/drivers/crypto/qce/dma.c
+++ b/drivers/crypto/qce/dma.c@@ -41,7 +41,7 @@ void qce_clear_bam_transaction(struct qce_device *qce) bam_txn->pre_bam_ce_idx = 0; } -int qce_submit_cmd_desc(struct qce_device *qce) +static int qce_do_submit_cmd_desc(struct qce_device *qce, struct bam_desc_metadata *meta) { struct qce_desc_info *qce_desc = qce->dma.bam_txn->desc; struct qce_bam_transaction *bam_txn = qce->dma.bam_txn;
@@ -50,7 +50,7 @@ int qce_submit_cmd_desc(struct qce_device *qce) unsigned long attrs = DMA_PREP_CMD; dma_cookie_t cookie; unsigned int mapped; - int ret; + int ret = -ENOMEM; mapped = dma_map_sg_attrs(qce->dev, bam_txn->wr_sgl, bam_txn->wr_sgl_cnt, DMA_TO_DEVICE, attrs);
@@ -59,9 +59,15 @@ int qce_submit_cmd_desc(struct qce_device *qce) dma_desc = dmaengine_prep_slave_sg(chan, bam_txn->wr_sgl, bam_txn->wr_sgl_cnt, DMA_MEM_TO_DEV, attrs); - if (!dma_desc) { - dma_unmap_sg(qce->dev, bam_txn->wr_sgl, bam_txn->wr_sgl_cnt, DMA_TO_DEVICE); - return -ENOMEM; + if (!dma_desc) + goto err_out; + + if (meta) { + meta->chan = chan; + + ret = dmaengine_desc_attach_metadata(dma_desc, meta, 0); + if (ret) + goto err_out; } qce_desc->dma_desc = dma_desc;
@@ -74,6 +80,29 @@ int qce_submit_cmd_desc(struct qce_device *qce) qce_dma_issue_pending(&qce->dma); return 0; + +err_out: + dma_unmap_sg(qce->dev, bam_txn->wr_sgl, bam_txn->wr_sgl_cnt, DMA_TO_DEVICE); + return ret; +} + +int qce_submit_cmd_desc(struct qce_device *qce) +{ + return qce_do_submit_cmd_desc(qce, NULL); +} + +int qce_submit_cmd_desc_lock(struct qce_device *qce) +{ + struct bam_desc_metadata meta = { .op = BAM_META_CMD_LOCK, }; + + return qce_do_submit_cmd_desc(qce, &meta); +} + +int qce_submit_cmd_desc_unlock(struct qce_device *qce) +{ + struct bam_desc_metadata meta = { .op = BAM_META_CMD_UNLOCK }; + + return qce_do_submit_cmd_desc(qce, &meta); } static void qce_prep_dma_cmd_desc(struct qce_device *qce, struct qce_dma_data *dma,
diff --git a/drivers/crypto/qce/dma.h b/drivers/crypto/qce/dma.h
index f05dfa9e6b25bd60e32f45079a8bc7e6a4cf81f9..4b3ee17db72e29b9f417994477ad8a0ec2294db1 100644
--- a/drivers/crypto/qce/dma.h
+++ b/drivers/crypto/qce/dma.h@@ -47,6 +47,10 @@ qce_sgtable_add(struct sg_table *sgt, struct scatterlist *sg_add, unsigned int max_len); void qce_write_dma(struct qce_device *qce, unsigned int offset, u32 val); int qce_submit_cmd_desc(struct qce_device *qce); +int qce_submit_cmd_desc_lock(struct qce_device *qce); +int qce_submit_cmd_desc_unlock(struct qce_device *qce); void qce_clear_bam_transaction(struct qce_device *qce); +int qce_bam_lock(struct qce_device *qce); +int qce_bam_unlock(struct qce_device *qce); #endif /* _DMA_H_ */
--
2.47.3