Re: [PATCH 11/19] coresight: trbe: Apply overwrite erratum for only wrap event
From: Leo Yan <leo.yan@arm.com>
Date: 2025-12-02 16:56:50
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On Tue, Dec 02, 2025 at 12:05:52PM +0000, Suzuki K Poulose wrote:
On 01/12/2025 11:22, Leo Yan wrote:quoted
The overwrite erratum occurs only on wrap events, so apply the extra wrap condition check in the workaround. Signed-off-by: Leo Yan <leo.yan@arm.com> --- drivers/hwtracing/coresight/coresight-trbe.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c index e579ea98523c24d23a0cd265dcdd0a46b52b52da..2600af12a8fb94bb8c74efda2a101aacd01b0b34 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.c +++ b/drivers/hwtracing/coresight/coresight-trbe.c@@ -714,7 +714,7 @@ static unsigned long trbe_get_trace_size(struct perf_output_handle *handle, * 64bytes. Thus we ignore the potential triggering of the erratum * on WRAP and limit the data to LIMIT. */ - if (wrap) + if (wrap && trbe_may_overwrite_in_fill_mode(buf->cpudata)) write = get_trbe_limit_pointer();This must be trbe_may_write_out_of_range() ?
SDEN (e.g., [1]) is ambiguous about how the write pointer acts for the out-of-range erratum. However, SDEN explicitly states for overwrite erratum: "The current write pointer also increments by the same number of cache line locations. If this is still concerned, I can add check trbe_may_write_out_of_range() in next spin. Thanks, Leo [1] https://documentation-service.arm.com/static/636a660b4e6cf12278ad89c4?token=