On 14/11/2025 04:03, Jian Hui Lee wrote:

On Wed, Nov 12, 2025 at 11:51 PM Krzysztof Kozlowski [off-list ref] wrote:

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Please trim the traces from all irrelevant information.

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Fixes: e6dec92308628 ("iommu/mediatek: Add mt2712 IOMMU support")

Add Cc stable.

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Signed-off-by: Jian Hui Lee <redacted>

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---
 drivers/memory/mtk-smi.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
index 733e22f695ab..8eb043ff8280 100644
--- a/drivers/memory/mtk-smi.c
+++ b/drivers/memory/mtk-smi.c

@@ -244,6 +244,10 @@ static int mtk_smi_larb_config_port_gen2_general(struct device *dev)
      struct arm_smccc_res res;
      int i;

+     /* larb->mmu and larb->bank are set in bind(), may not be ready yet */

And how do you synchronize this between CPUs? IOW, what certainty you
have that this CPU sees correct data and the checks below have any sense?

Thank you for the review and for pointing this out. Moving
pm_runtime_enable/disable to component bind/unbind should ensure that
the synchronization happens correctly. I will send a v2 to address
those you mentioned.

Runtime PM synchronizes nothing in this matter, so I don't understand
what you want to achieve with it.

Best regards,
Krzysztof